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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 10:28:35 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 10:28:35 +0000
commit745ca1eed7dc0a056b066f16aea750ce6fa8a530 (patch)
treefeaeaf870a71f81a3f4ecd2e422032047322a647 /lib/Target/SystemZ/SystemZFrameLowering.cpp
parent835e284214c6e920924b5375590e77fd953cbefe (diff)
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[SystemZ] Rename subregs and add subreg_h32
Use subreg_hNN and subreg_lNN for the high and low NN bits of a register. List the low registers first, so that subreg_l32 also means the low 32 bits of a 128-bit register. Floats are stored in the upper 32 bits of a 64-bit register, so they should use subreg_h32 rather than subreg_l32. No behavioral change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191659 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZFrameLowering.cpp')
-rw-r--r--lib/Target/SystemZ/SystemZFrameLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/SystemZ/SystemZFrameLowering.cpp b/lib/Target/SystemZ/SystemZFrameLowering.cpp
index ed75e28cf9..acfb491b95 100644
--- a/lib/Target/SystemZ/SystemZFrameLowering.cpp
+++ b/lib/Target/SystemZ/SystemZFrameLowering.cpp
@@ -111,7 +111,7 @@ static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB,
const SystemZTargetMachine &TM,
unsigned GPR64, bool IsImplicit) {
const SystemZRegisterInfo *RI = TM.getRegisterInfo();
- unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_32bit);
+ unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32);
bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
if (!IsLive || !IsImplicit) {
MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive));