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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-05-28 10:13:54 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-05-28 10:13:54 +0000
commit06c3c9a9e1cc313d911e939e3e994feaf43cc3a7 (patch)
treef3b05ff8e8f185af8d40ec50aab831eeef11ff41 /lib/Target/SystemZ/SystemZInstrInfo.h
parentc1a0806ff53bef0abc805a4062cd42b05ef8088b (diff)
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[SystemZ] Tweak SystemZInstrInfo::isBranch() interface
This is needed for the upcoming compare-and-branch patch. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182762 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrInfo.h')
-rw-r--r--lib/Target/SystemZ/SystemZInstrInfo.h14
1 files changed, 12 insertions, 2 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h b/lib/Target/SystemZ/SystemZInstrInfo.h
index 7fcc2c5ce7..322219c52f 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.h
+++ b/lib/Target/SystemZ/SystemZInstrInfo.h
@@ -42,6 +42,17 @@ namespace SystemZII {
// @GOT (aka @GOTENT)
MO_GOT = (1 << 0)
};
+ // Information about a branch instruction.
+ struct Branch {
+ // CCMASK_<N> is set if the branch should be taken when CC == N.
+ unsigned CCMask;
+
+ // The target of the branch.
+ const MachineOperand *Target;
+
+ Branch(unsigned ccMask, const MachineOperand *target)
+ : CCMask(ccMask), Target(target) {}
+ };
}
class SystemZInstrInfo : public SystemZGenInstrInfo {
@@ -101,8 +112,7 @@ public:
// values on which the instruction will branch, and set Target
// to the operand that contains the branch target. This target
// can be a register or a basic block.
- bool isBranch(const MachineInstr *MI, unsigned &Cond,
- const MachineOperand *&Target) const;
+ SystemZII::Branch getBranchInfo(const MachineInstr *MI) const;
// Get the load and store opcodes for a given register class.
void getLoadStoreOpcodes(const TargetRegisterClass *RC,