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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-02 15:28:56 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-02 15:28:56 +0000 |
commit | 1ce4894a3f1ce6e63c1b109c24235d81dea2908f (patch) | |
tree | 60dc3250ee6c3f68f37ff3e6dadd9a3bae7cabdb /lib/Target/SystemZ/SystemZInstrInfo.h | |
parent | 9188443a2d35352c4e8a2cffd1b4d31d47843b26 (diff) | |
download | llvm-1ce4894a3f1ce6e63c1b109c24235d81dea2908f.tar.gz llvm-1ce4894a3f1ce6e63c1b109c24235d81dea2908f.tar.bz2 llvm-1ce4894a3f1ce6e63c1b109c24235d81dea2908f.tar.xz |
[SystemZ] Use MVC to spill loads and stores
Try to use MVC when spilling the destination of a simple load or the source
of a simple store. As explained in the comment, this doesn't yet handle
the case where the load or store location is also a frame index, since
that could lead to two simultaneous scavenger spills, something the
backend can't handle yet. spill-02.py tests that this restriction kicks in,
but unfortunately I've not yet found a case that would fail without it.
The volatile trick I used for other scavenger tests doesn't work here
because we can't use MVC for volatile accesses anyway.
I'm planning on relaxing the restriction later, hopefully with a test
that does trigger the problem...
Tests @f8 and @f9 also showed that L(G)RL and ST(G)RL were wrongly
classified as SimpleBDX{Load,Store}. It wouldn't be easy to test for
that bug separately, which is why I didn't split out the fix as a
separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185434 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrInfo.h')
-rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h b/lib/Target/SystemZ/SystemZInstrInfo.h index d6980f7171..8d9a3eaacf 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.h +++ b/lib/Target/SystemZ/SystemZInstrInfo.h @@ -111,6 +111,14 @@ public: unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const LLVM_OVERRIDE; + virtual MachineInstr * + foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, + const SmallVectorImpl<unsigned> &Ops, + int FrameIndex) const; + virtual MachineInstr * + foldMemoryOperandImpl(MachineFunction &MF, MachineInstr* MI, + const SmallVectorImpl<unsigned> &Ops, + MachineInstr* LoadMI) const; virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const LLVM_OVERRIDE; virtual bool |