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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-05 11:23:46 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-05 11:23:46 +0000 |
commit | 93795574785de252703591e7fcc8f052c762f25e (patch) | |
tree | de693d743c5334444b688797de354cdc279bbdbe /lib/Target/SystemZ/SystemZInstrInfo.h | |
parent | f8e16c6f5a3a0d2cc6f7ae6dae0a8f55a89cfb2f (diff) | |
download | llvm-93795574785de252703591e7fcc8f052c762f25e.tar.gz llvm-93795574785de252703591e7fcc8f052c762f25e.tar.bz2 llvm-93795574785de252703591e7fcc8f052c762f25e.tar.xz |
[SystemZ] Use BRCT and BRCTG to eliminate add-&-compare sequences
This patch just uses a peephole test for "add; compare; branch" sequences
within a single block. The IR optimizers already convert loops to
decrement-and-branch-on-nonzero form in some cases, so even this
simplistic test triggers many times during a clang bootstrap and
projects/test-suite run. It looks like there are still cases where we
need to more strongly prefer branches on nonzero though. E.g. I saw a
case where a loop that started out with a check for 0 ended up with a
check for -1. I'll try to look at that sometime.
I ended up adding the Reference class because MachineInstr::readsRegister()
doesn't check for subregisters (by design, as far as I could tell).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187723 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrInfo.h')
-rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h b/lib/Target/SystemZ/SystemZInstrInfo.h index 1392745672..b12b471a4d 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.h +++ b/lib/Target/SystemZ/SystemZInstrInfo.h @@ -69,7 +69,15 @@ namespace SystemZII { // An instruction that peforms a 64-bit signed comparison and branches // on the result. - BranchCG + BranchCG, + + // An instruction that decrements a 32-bit register and branches if + // the result is nonzero. + BranchCT, + + // An instruction that decrements a 64-bit register and branches if + // the result is nonzero. + BranchCTG }; // Information about a branch instruction. struct Branch { |