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author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:03:41 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:03:41 +0000 |
commit | 3166a9ac5c81621bb7f58f8cd4311694af26fa29 (patch) | |
tree | 81c0b59664723f430e1fcd93d0742d238f6bf81b /lib/Target/SystemZ/SystemZInstrInfo.td | |
parent | 501f55d84159c409bb902361812bc1912a798026 (diff) | |
download | llvm-3166a9ac5c81621bb7f58f8cd4311694af26fa29.tar.gz llvm-3166a9ac5c81621bb7f58f8cd4311694af26fa29.tar.bz2 llvm-3166a9ac5c81621bb7f58f8cd4311694af26fa29.tar.xz |
32-bit ri addressing mode has only 12-bit displacement
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75973 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrInfo.td')
-rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.td | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td index ec0956e48e..2c08c2fe60 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/lib/Target/SystemZ/SystemZInstrInfo.td @@ -205,6 +205,11 @@ def i32i16imm : Operand<i32>; def i64i32imm : Operand<i64>; // Branch targets have OtherVT type. def brtarget : Operand<OtherVT>; + +// Unigned i12 +def u12imm : Operand<i32> { + let PrintMethod = "printU16ImmOperand"; +} // Signed i16 def s16imm : Operand<i32> { let PrintMethod = "printS16ImmOperand"; @@ -212,6 +217,13 @@ def s16imm : Operand<i32> { def s16imm64 : Operand<i64> { let PrintMethod = "printS16ImmOperand"; } +// Signed i20 +def s20imm : Operand<i32> { + let PrintMethod = "printS20ImmOperand"; +} +def s20imm64 : Operand<i64> { + let PrintMethod = "printS20ImmOperand"; +} // Signed i32 def s32imm : Operand<i32> { let PrintMethod = "printS32ImmOperand"; @@ -228,15 +240,15 @@ def s32imm64 : Operand<i64> { // riaddr := reg + imm def riaddr32 : Operand<i32>, - ComplexPattern<i32, 2, "SelectAddrRI", []> { + ComplexPattern<i32, 2, "SelectAddrRI32", []> { let PrintMethod = "printRIAddrOperand"; - let MIOperandInfo = (ops ADDR32:$base, i32imm:$disp); + let MIOperandInfo = (ops ADDR32:$base, u12imm:$disp); } def riaddr : Operand<i64>, ComplexPattern<i64, 2, "SelectAddrRI", []> { let PrintMethod = "printRIAddrOperand"; - let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp); + let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp); } //===----------------------------------------------------------------------===// @@ -245,12 +257,12 @@ def riaddr : Operand<i64>, def rriaddr : Operand<i64>, ComplexPattern<i64, 3, "SelectAddrRRI", [], []> { let PrintMethod = "printRRIAddrOperand"; - let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp, ADDR64:$index); + let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp, ADDR64:$index); } def laaddr : Operand<i64>, ComplexPattern<i64, 3, "SelectLAAddr", [add, sub, or, frameindex], []> { let PrintMethod = "printRRIAddrOperand"; - let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp, ADDR64:$index); + let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp, ADDR64:$index); } //===----------------------------------------------------------------------===// |