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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:34:24 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:34:24 +0000 |
| commit | fc9ceeaad8728257df62758d91d70e1f0789f38e (patch) | |
| tree | 521e7dac16e65a3d13818caa077bbdac7fd49bba /lib/Target/SystemZ/SystemZInstrInfo.td | |
| parent | 89edcd0927aa56584686c94bbb6914ce9f445e3a (diff) | |
| download | llvm-fc9ceeaad8728257df62758d91d70e1f0789f38e.tar.gz llvm-fc9ceeaad8728257df62758d91d70e1f0789f38e.tar.bz2 llvm-fc9ceeaad8728257df62758d91d70e1f0789f38e.tar.xz | |
Proper match halfword-imm operands for mov and add
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75920 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrInfo.td')
| -rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.td | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td index 85e7fd378f..01f63b3af7 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/lib/Target/SystemZ/SystemZInstrInfo.td @@ -66,6 +66,13 @@ def i64hh16 : PatLeaf<(i64 imm), [{ return ((N->getZExtValue() & 0xFFFF000000000000ULL) == N->getZExtValue()); }], HH16>; +def immSExt16 : PatLeaf<(i64 imm), [{ + // immSExt16 predicate - true if the immediate fits in a 16-bit sign extended + // field. + uint64_t val = N->getZExtValue(); + return ((int64_t)val == (int16_t)val); +}]>; + //===----------------------------------------------------------------------===// // Control Flow Instructions... // @@ -87,9 +94,9 @@ def MOV64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src), // FIXME: Provide proper encoding! let isReMaterializable = 1, isAsCheapAsAMove = 1 in { -def MOV64ri : Pseudo<(outs GR64:$dst), (ins i64imm:$src), - "lghi\t{$dst, $src}", - [(set GR64:$dst, imm:$src)]>; +def MOV64ri16 : Pseudo<(outs GR64:$dst), (ins i64imm:$src), + "lghi\t{$dst, $src}", + [(set GR64:$dst, immSExt16:$src)]>; } //===----------------------------------------------------------------------===// @@ -108,10 +115,10 @@ def ADD64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2), } // FIXME: Provide proper encoding! -def ADD64ri : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2), - "aghi\t{$dst, $src2}", - [(set GR64:$dst, (add GR64:$src1, imm:$src2)), - (implicit PSW)]>; +def ADD64ri16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2), + "aghi\t{$dst, $src2}", + [(set GR64:$dst, (add GR64:$src1, immSExt16:$src2)), + (implicit PSW)]>; let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y // FIXME: Provide proper encoding! |