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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 08:54:17 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 08:54:17 +0000
commit3d307b31b6035c81b132e767b77183a1d6db0d84 (patch)
tree613f32d3abc030f63533d32019202bff267ee83f /lib/Target/SystemZ
parent514756983e9ba3684a89ed583bf5a98ffb20c203 (diff)
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[SystemZ] Add change missing from previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191656 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ')
-rw-r--r--lib/Target/SystemZ/SystemZRegisterInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.td b/lib/Target/SystemZ/SystemZRegisterInfo.td
index 0821d02060..24f2458ad5 100644
--- a/lib/Target/SystemZ/SystemZRegisterInfo.td
+++ b/lib/Target/SystemZ/SystemZRegisterInfo.td
@@ -94,7 +94,7 @@ defm GR128 : SystemZRegClass<"GR128", untyped, 128, (add R0Q, R2Q, R4Q,
// Base and index registers. Everything except R0, which in an address
// context evaluates as 0.
-defm ADDR32 : SystemZRegClass<"ADDR32", i32, 32, (sub GR32Bit, R0W)>;
+defm ADDR32 : SystemZRegClass<"ADDR32", i32, 32, (sub GR32Bit, R0L)>;
defm ADDR64 : SystemZRegClass<"ADDR64", i64, 64, (sub GR64Bit, R0D)>;
// Not used directly, but needs to exist for ADDR32 and ADDR64 subregs