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authorKevin Enderby <enderby@apple.com>2012-10-22 22:31:46 +0000
committerKevin Enderby <enderby@apple.com>2012-10-22 22:31:46 +0000
commit3ed0316f756e2f1730f46654776fcf77f5ace7aa (patch)
treec7769b081a31d4e7194751368e2090ba967bfb2b /lib/Target/X86/InstPrinter
parent8ee16c7b661ce0b1c1d33db07b57ad2c88b5a8b2 (diff)
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Add support for annotated disassembly output for X86 and arm.
Per the October 12, 2012 Proposal for annotated disassembly output sent out by Jim Grosbach this set of changes implements this for X86 and arm. The llvm-mc tool now has a -mdis option to produced the marked up disassembly and a couple of small example test cases have been added. rdar://11764962 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166445 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/InstPrinter')
-rw-r--r--lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp32
1 files changed, 30 insertions, 2 deletions
diff --git a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
index 149be86fe8..edad47312d 100644
--- a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
+++ b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
@@ -34,7 +34,11 @@ using namespace llvm;
void X86ATTInstPrinter::printRegName(raw_ostream &OS,
unsigned RegNo) const {
+ if (UseMarkup)
+ OS << "<reg:";
OS << '%' << getRegisterName(RegNo);
+ if (UseMarkup)
+ OS << ">";
}
void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
@@ -151,17 +155,29 @@ void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
+ if (UseMarkup)
+ O << "<reg:";
O << '%' << getRegisterName(Op.getReg());
+ if (UseMarkup)
+ O << ">";
} else if (Op.isImm()) {
+ if (UseMarkup)
+ O << "<imm:";
// Print X86 immediates as signed values.
O << '$' << (int64_t)Op.getImm();
+ if (UseMarkup)
+ O << ">";
if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256))
*CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Op.getImm());
} else {
assert(Op.isExpr() && "unknown operand kind in printOperand");
+ if (UseMarkup)
+ O << "<imm:";
O << '$' << *Op.getExpr();
+ if (UseMarkup)
+ O << ">";
}
}
@@ -172,6 +188,9 @@ void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
const MCOperand &DispSpec = MI->getOperand(Op+3);
const MCOperand &SegReg = MI->getOperand(Op+4);
+ if (UseMarkup)
+ O << "<mem:";
+
// If this has a segment register, print it.
if (SegReg.getReg()) {
printOperand(MI, Op+4, O);
@@ -196,9 +215,18 @@ void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
O << ',';
printOperand(MI, Op+2, O);
unsigned ScaleVal = MI->getOperand(Op+1).getImm();
- if (ScaleVal != 1)
- O << ',' << ScaleVal;
+ if (ScaleVal != 1) {
+ O << ',';
+ if (UseMarkup)
+ O << "<imm:";
+ O << ScaleVal;
+ if (UseMarkup)
+ O << ">";
+ }
}
O << ')';
}
+
+ if (UseMarkup)
+ O << ">";
}