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| author | Craig Topper <craig.topper@gmail.com> | 2012-09-19 06:37:45 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-09-19 06:37:45 +0000 |
| commit | 8a312fb3aaec90537d434a5cc41edf566ff80dca (patch) | |
| tree | 9e96e3d182ef24c7f7db5e1b511d6916a2682b2c /lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | |
| parent | f7876426f002d7dd763aff7f16a6e8bfa24599bb (diff) | |
| download | llvm-8a312fb3aaec90537d434a5cc41edf566ff80dca.tar.gz llvm-8a312fb3aaec90537d434a5cc41edf566ff80dca.tar.bz2 llvm-8a312fb3aaec90537d434a5cc41edf566ff80dca.tar.xz | |
Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164204 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 02a83f9c8b..6b0ec4fb78 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -560,15 +560,6 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, } - // Set the vector length to 256-bit if YMM0-YMM15 is used - for (unsigned i = 0; i != MI.getNumOperands(); ++i) { - if (!MI.getOperand(i).isReg()) - continue; - unsigned SrcReg = MI.getOperand(i).getReg(); - if (SrcReg >= X86::YMM0 && SrcReg <= X86::YMM15) - VEX_L = 1; - } - // Classify VEX_B, VEX_4V, VEX_R, VEX_X unsigned NumOps = Desc.getNumOperands(); unsigned CurOp = 0; |