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| author | Chris Lattner <sabre@nondot.org> | 2003-11-07 00:34:33 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-11-07 00:34:33 +0000 |
| commit | 0239d7af571fb1856a2fac71fab0f545d757e930 (patch) | |
| tree | b909bae7b5f3d36dd17a24eff803dd5b072e1d74 /lib/Target/X86/Makefile | |
| parent | a6538852d6b89a578ca5002429ccb27277f0734b (diff) | |
| download | llvm-0239d7af571fb1856a2fac71fab0f545d757e930.tar.gz llvm-0239d7af571fb1856a2fac71fab0f545d757e930.tar.bz2 llvm-0239d7af571fb1856a2fac71fab0f545d757e930.tar.xz | |
Hopefully fix the objdir != srcdir issue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9761 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/Makefile')
| -rw-r--r-- | lib/Target/X86/Makefile | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile index fa13a93e1e..b151fa7ecf 100644 --- a/lib/Target/X86/Makefile +++ b/lib/Target/X86/Makefile @@ -15,27 +15,33 @@ $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \ X86GenRegisterInfo.inc X86GenInstrNames.inc \ X86GenInstrInfo.inc X86GenInstrSelector.inc -X86GenRegisterNames.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterNames.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \ + $(SourceDir)/../Target.td $(TBLGEN) @echo "Building X86.td register names with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@ -X86GenRegisterInfo.h.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterInfo.h.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \ + $(SourceDir)/../Target.td $(TBLGEN) @echo "Building X86.td register information header with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@ -X86GenRegisterInfo.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterInfo.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \ + $(SourceDir)/../Target.td $(TBLGEN) @echo "Building X86.td register information implementation with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@ -X86GenInstrNames.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrNames.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \ + $(SourceDir)/../Target.td $(TBLGEN) @echo "Building X86.td instruction names with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@ -X86GenInstrInfo.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrInfo.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \ + $(SourceDir)/../Target.td $(TBLGEN) @echo "Building X86.td instruction information with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@ -X86GenInstrSelector.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrSelector.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \ + $(SourceDir)/../Target.td $(TBLGEN) @echo "Building X86.td instruction selector with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@ |