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| author | Chris Lattner <sabre@nondot.org> | 2004-10-03 20:36:57 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-10-03 20:36:57 +0000 |
| commit | 9a3e49a1b3f54e6f29496108b13aed3111f004a0 (patch) | |
| tree | a7b537388a262cc62292b3ca83952f3454b9bbd5 /lib/Target/X86/Makefile | |
| parent | 3a173dfc7240aed52a9ebaea6890a76cf54ec333 (diff) | |
| download | llvm-9a3e49a1b3f54e6f29496108b13aed3111f004a0.tar.gz llvm-9a3e49a1b3f54e6f29496108b13aed3111f004a0.tar.bz2 llvm-9a3e49a1b3f54e6f29496108b13aed3111f004a0.tar.xz | |
Add support for the -x86-asm-syntax flag, which can be used to choose between
Intel and AT&T style assembly language. The ultimate goal of this is to
eliminate the GasBugWorkaroundEmitter class, but for now AT&T style emission
is not fully operational.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16639 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/Makefile')
| -rw-r--r-- | lib/Target/X86/Makefile | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile index 51208dfd69..dd745402fe 100644 --- a/lib/Target/X86/Makefile +++ b/lib/Target/X86/Makefile @@ -15,7 +15,8 @@ TARGET = X86 # Make sure that tblgen is run, first thing. $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \ X86GenRegisterInfo.inc X86GenInstrNames.inc \ - X86GenInstrInfo.inc X86GenAsmWriter.inc + X86GenInstrInfo.inc X86GenATTAsmWriter.inc \ + X86GenIntelAsmWriter.inc TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \ $(SourceDir)/../Target.td @@ -40,10 +41,14 @@ $(TARGET)GenInstrInfo.inc:: $(TDFILES) $(TBLGEN) @echo "Building $(TARGET).td instruction information with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@ -$(TARGET)GenAsmWriter.inc:: $(TDFILES) $(TBLGEN) - @echo "Building $(TARGET).td assembly writer with tblgen" +$(TARGET)GenATTAsmWriter.inc:: $(TDFILES) $(TBLGEN) + @echo "Building $(TARGET).td AT&T assembly writer with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -o $@ +$(TARGET)GenIntelAsmWriter.inc:: $(TDFILES) $(TBLGEN) + @echo "Building $(TARGET).td Intel assembly writer with tblgen" + $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -asmwriternum=1 -o $@ + #$(TARGET)GenInstrSelector.inc:: $(TDFILES) $(TBLGEN) # @echo "Building $(TARGET).td instruction selector with tblgen" # $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@ |