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| author | Torok Edwin <edwintorok@gmail.com> | 2009-02-01 18:15:56 +0000 |
|---|---|---|
| committer | Torok Edwin <edwintorok@gmail.com> | 2009-02-01 18:15:56 +0000 |
| commit | 3f142c36ad04c1aabac90df6a866bd2b0767f24f (patch) | |
| tree | 912ad6d239ad53220145f3547467e88c5c76df48 /lib/Target/X86/X86CallingConv.td | |
| parent | b0d5cdd52e8448f769cd71aaee6a4b8592dc08b1 (diff) | |
| download | llvm-3f142c36ad04c1aabac90df6a866bd2b0767f24f.tar.gz llvm-3f142c36ad04c1aabac90df6a866bd2b0767f24f.tar.bz2 llvm-3f142c36ad04c1aabac90df6a866bd2b0767f24f.tar.xz | |
Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
var-args, and don't allow FP return values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86CallingConv.td')
| -rw-r--r-- | lib/Target/X86/X86CallingConv.td | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td index db92a0cdc0..6742a90058 100644 --- a/lib/Target/X86/X86CallingConv.td +++ b/lib/Target/X86/X86CallingConv.td @@ -49,7 +49,7 @@ def RetCC_X86_32_C : CallingConv<[ // weirdly; this is really the sse-regparm calling convention) in which // case they use XMM0, otherwise it is the same as the common X86 calling // conv. - CCIfInReg<CCIfSubtarget<"hasSSE2()", + CCIfInReg<CCIfSubtarget<"hasSSE2()", CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>, CCIfType<[f32,f64], CCAssignToReg<[ST0, ST1]>>, CCDelegateTo<RetCC_X86Common> @@ -134,7 +134,8 @@ def CC_X86_64_C : CallingConv<[ // The first 8 FP/Vector arguments are passed in XMM registers. CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], - CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>, + CCIfSubtarget<"hasSSE1()", + CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>, // The first 8 MMX (except for v1i64) vector arguments are passed in XMM // registers on Darwin. @@ -223,7 +224,8 @@ def CC_X86_64_TailCall : CallingConv<[ // The first 8 FP/Vector arguments are passed in XMM registers. CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], - CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>, + CCIfSubtarget<"hasSSE1()", + CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>, // The first 8 MMX (except for v1i64) vector arguments are passed in XMM // registers on Darwin. |