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| author | Craig Topper <craig.topper@gmail.com> | 2013-08-15 02:33:50 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2013-08-15 02:33:50 +0000 |
| commit | 5a0910b34959fa8e0b5a49908f51a15bc3a48069 (patch) | |
| tree | d946a6df74da234c24e33b16a12b4ebcf913d408 /lib/Target/X86/X86ISelDAGToDAG.cpp | |
| parent | e742d687369f79702894b6cf302e1f222c5d7432 (diff) | |
| download | llvm-5a0910b34959fa8e0b5a49908f51a15bc3a48069.tar.gz llvm-5a0910b34959fa8e0b5a49908f51a15bc3a48069.tar.bz2 llvm-5a0910b34959fa8e0b5a49908f51a15bc3a48069.tar.xz | |
Replace getValueType().getSimpleVT() with getSimpleValueType(). Also remove one weird cast from MVT->EVT just to call getSimpleVT().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188441 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelDAGToDAG.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 9465420ba9..8f8d488b1b 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -2609,7 +2609,7 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) { // On x86-32, only the ABCD registers have 8-bit subregisters. if (!Subtarget->is64Bit()) { const TargetRegisterClass *TRC; - switch (N0.getValueType().getSimpleVT().SimpleTy) { + switch (N0.getSimpleValueType().SimpleTy) { case MVT::i32: TRC = &X86::GR32_ABCDRegClass; break; case MVT::i16: TRC = &X86::GR16_ABCDRegClass; break; default: llvm_unreachable("Unsupported TEST operand type!"); @@ -2644,7 +2644,7 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) { // Put the value in an ABCD register. const TargetRegisterClass *TRC; - switch (N0.getValueType().getSimpleVT().SimpleTy) { + switch (N0.getSimpleValueType().SimpleTy) { case MVT::i64: TRC = &X86::GR64_ABCDRegClass; break; case MVT::i32: TRC = &X86::GR32_ABCDRegClass; break; case MVT::i16: TRC = &X86::GR16_ABCDRegClass; break; |