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| author | Nadav Rotem <nrotem@apple.com> | 2013-02-24 07:09:35 +0000 |
|---|---|---|
| committer | Nadav Rotem <nrotem@apple.com> | 2013-02-24 07:09:35 +0000 |
| commit | f8db4478f80ef63cf51518affc7b97c9d310bc23 (patch) | |
| tree | c27f372d33761bab7ef8f928ba7e5431ef071363 /lib/Target/X86/X86ISelLowering.cpp | |
| parent | 459d35cb7975804048684261f2358eedbd2209c1 (diff) | |
| download | llvm-f8db4478f80ef63cf51518affc7b97c9d310bc23.tar.gz llvm-f8db4478f80ef63cf51518affc7b97c9d310bc23.tar.bz2 llvm-f8db4478f80ef63cf51518affc7b97c9d310bc23.tar.xz | |
Revert r169638 because it broke Mesa llvmpipe tests.
Fix PR15239.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175985 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 2315ac7f23..1543e23a46 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -16248,11 +16248,6 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG, DebugLoc DL = N->getDebugLoc(); - // We are going to replace the AND, OR, NAND with either BLEND - // or PSIGN, which only look at the MSB. The VSRAI instruction - // does not affect the highest bit, so we can get rid of it. - Mask = Mask.getOperand(0); - // Now we know we at least have a plendvb with the mask val. See if // we can form a psignb/w/d. // psign = x.type == y.type == mask.type && y = sub(0, x); @@ -16261,7 +16256,7 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG, X.getValueType() == MaskVT && Y.getValueType() == MaskVT) { assert((EltBits == 8 || EltBits == 16 || EltBits == 32) && "Unsupported VT for PSIGN"); - Mask = DAG.getNode(X86ISD::PSIGN, DL, MaskVT, X, Mask); + Mask = DAG.getNode(X86ISD::PSIGN, DL, MaskVT, X, Mask.getOperand(0)); return DAG.getNode(ISD::BITCAST, DL, VT, Mask); } // PBLENDVB only available on SSE 4.1 |