summaryrefslogtreecommitdiff
path: root/lib/Target/X86/X86InstrBuilder.h
diff options
context:
space:
mode:
authorDan Gohman <gohman@apple.com>2008-09-30 01:21:32 +0000
committerDan Gohman <gohman@apple.com>2008-09-30 01:21:32 +0000
commit5396c99baa8fe0c821b9157590d8e9cd498b15bc (patch)
treecd047dab96e92fb72f33b9d5d283456f2cadd1f9 /lib/Target/X86/X86InstrBuilder.h
parent57c3dac0df7ac1b53ae7c0e5d2adc459fc7bd37c (diff)
downloadllvm-5396c99baa8fe0c821b9157590d8e9cd498b15bc.tar.gz
llvm-5396c99baa8fe0c821b9157590d8e9cd498b15bc.tar.bz2
llvm-5396c99baa8fe0c821b9157590d8e9cd498b15bc.tar.xz
Fix X86FastISel's output for x86-32 PIC constant pool addresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56829 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrBuilder.h')
-rw-r--r--lib/Target/X86/X86InstrBuilder.h12
1 files changed, 7 insertions, 5 deletions
diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index b5924cb761..87c63421bc 100644
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -114,13 +114,15 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
/// addConstantPoolReference - This function is used to add a reference to the
/// base of a constant value spilled to the per-function constant pool. The
-/// reference has base register ConstantPoolIndex offset which is retained until
-/// either machine code emission or assembly output. This allows an optional
-/// offset to be added as well.
+/// reference uses the abstract ConstantPoolIndex which is retained until
+/// either machine code emission or assembly output. In PIC mode on x86-32,
+/// the GlobalBaseReg parameter can be used to make this a
+/// GlobalBaseReg-relative reference.
///
inline const MachineInstrBuilder &
-addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI) {
- return MIB.addReg(0).addImm(1).addReg(0).addConstantPoolIndex(CPI);
+addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
+ unsigned GlobalBaseReg = 0) {
+ return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0).addConstantPoolIndex(CPI);
}
} // End llvm namespace