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| author | Chad Rosier <mcrosier@apple.com> | 2012-06-22 22:07:19 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2012-06-22 22:07:19 +0000 |
| commit | 670712ca3fb43ed9ea18f6569c2e3b925d516dd5 (patch) | |
| tree | 46136454c75205d79db495010a7c75a020620f2c /lib/Target/X86/X86InstrBuilder.h | |
| parent | bfd752f310078561de07850ce66213c4579a0d7e (diff) | |
| download | llvm-670712ca3fb43ed9ea18f6569c2e3b925d516dd5.tar.gz llvm-670712ca3fb43ed9ea18f6569c2e3b925d516dd5.tar.bz2 llvm-670712ca3fb43ed9ea18f6569c2e3b925d516dd5.tar.xz | |
Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159035 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrBuilder.h')
| -rw-r--r-- | lib/Target/X86/X86InstrBuilder.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h index fa1d67644d..aaef4a466d 100644 --- a/lib/Target/X86/X86InstrBuilder.h +++ b/lib/Target/X86/X86InstrBuilder.h @@ -55,11 +55,11 @@ struct X86AddressMode { : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) { Base.Reg = 0; } - - + + void getFullAddress(SmallVectorImpl<MachineOperand> &MO) { assert(Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8); - + if (BaseType == X86AddressMode::RegBase) MO.push_back(MachineOperand::CreateReg(Base.Reg, false, false, false, false, false, 0, false)); @@ -67,16 +67,16 @@ struct X86AddressMode { assert(BaseType == X86AddressMode::FrameIndexBase); MO.push_back(MachineOperand::CreateFI(Base.FrameIndex)); } - + MO.push_back(MachineOperand::CreateImm(Scale)); MO.push_back(MachineOperand::CreateReg(IndexReg, false, false, false, false, false, 0, false)); - + if (GV) MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); else MO.push_back(MachineOperand::CreateImm(Disp)); - + MO.push_back(MachineOperand::CreateReg(0, false, false, false, false, false, 0, false)); } @@ -122,7 +122,7 @@ static inline const MachineInstrBuilder & addFullAddress(const MachineInstrBuilder &MIB, const X86AddressMode &AM) { assert(AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8); - + if (AM.BaseType == X86AddressMode::RegBase) MIB.addReg(AM.Base.Reg); else { @@ -135,7 +135,7 @@ addFullAddress(const MachineInstrBuilder &MIB, MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); else MIB.addImm(AM.Disp); - + return MIB.addReg(0); } |