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| author | Stuart Hastings <stuart@apple.com> | 2011-05-19 16:59:50 +0000 |
|---|---|---|
| committer | Stuart Hastings <stuart@apple.com> | 2011-05-19 16:59:50 +0000 |
| commit | b6dcf3c51429cc7a444cc4b121886b2060a11278 (patch) | |
| tree | 9cf3543c156340ca260d5dd4479607220b5a33e2 /lib/Target/X86/X86InstrExtension.td | |
| parent | 26847d40dbee014a870f15315b93262caab1afa0 (diff) | |
| download | llvm-b6dcf3c51429cc7a444cc4b121886b2060a11278.tar.gz llvm-b6dcf3c51429cc7a444cc4b121886b2060a11278.tar.bz2 llvm-b6dcf3c51429cc7a444cc4b121886b2060a11278.tar.xz | |
Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be
pseudos. rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131641 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrExtension.td')
| -rw-r--r-- | lib/Target/X86/X86InstrExtension.td | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/lib/Target/X86/X86InstrExtension.td b/lib/Target/X86/X86InstrExtension.td index 867c0f8b68..b061654c2a 100644 --- a/lib/Target/X86/X86InstrExtension.td +++ b/lib/Target/X86/X86InstrExtension.td @@ -45,14 +45,12 @@ def MOVSX16rr8W : I<0xBE, MRMSrcReg, (outs GR16:$dst), (ins GR8:$src), "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize; def MOVSX16rm8W : I<0xBE, MRMSrcMem, (outs GR16:$dst), (ins i8mem:$src), "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize; - -// FIXME: Use a pat pattern or define a syntax here. -let isCodeGenOnly=1 in { def MOVSX16rr8 : I<0xBE, MRMSrcReg, (outs GR16:$dst), (ins GR8 :$src), - "", [(set GR16:$dst, (sext GR8:$src))]>, TB; + "movs{bl|x}\t{$src, $dst|$dst, $src}", + [(set GR16:$dst, (sext GR8:$src))]>, TB; def MOVSX16rm8 : I<0xBE, MRMSrcMem, (outs GR16:$dst), (ins i8mem :$src), - "", [(set GR16:$dst, (sextloadi16i8 addr:$src))]>, TB; -} + "movs{bl|x}\t{$src, $dst|$dst, $src}", + [(set GR16:$dst, (sextloadi16i8 addr:$src))]>, TB; def MOVSX32rr8 : I<0xBE, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src), "movs{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (sext GR8:$src))]>, TB; @@ -73,13 +71,12 @@ def MOVZX16rr8W : I<0xB6, MRMSrcReg, (outs GR16:$dst), (ins GR8:$src), "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize; def MOVZX16rm8W : I<0xB6, MRMSrcMem, (outs GR16:$dst), (ins i8mem:$src), "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize; -// FIXME: Use a pat pattern or define a syntax here. -let isCodeGenOnly=1 in { def MOVZX16rr8 : I<0xB6, MRMSrcReg, (outs GR16:$dst), (ins GR8 :$src), - "", [(set GR16:$dst, (zext GR8:$src))]>, TB; + "movz{bl|x}\t{$src, $dst|$dst, $src}", + [(set GR16:$dst, (zext GR8:$src))]>, TB; def MOVZX16rm8 : I<0xB6, MRMSrcMem, (outs GR16:$dst), (ins i8mem :$src), - "", [(set GR16:$dst, (zextloadi16i8 addr:$src))]>, TB; -} + "movz{bl|x}\t{$src, $dst|$dst, $src}", + [(set GR16:$dst, (zextloadi16i8 addr:$src))]>, TB; def MOVZX32rr8 : I<0xB6, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src), "movz{bl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zext GR8:$src))]>, TB; |