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authorChris Lattner <sabre@nondot.org>2010-10-05 05:32:15 +0000
committerChris Lattner <sabre@nondot.org>2010-10-05 05:32:15 +0000
commit434c7cb8a19c57f25791b9789b630934ba53c621 (patch)
tree4e0b85014c29df25258cd4793c5bac464cf8af4b /lib/Target/X86/X86InstrFPStack.td
parent894a1b1739bedbc55ca090d770b0bed95a4d8a3a (diff)
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refactor .td files a bit, moving system instructions out to X86InstrSystem.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115591 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrFPStack.td')
-rw-r--r--lib/Target/X86/X86InstrFPStack.td7
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrFPStack.td b/lib/Target/X86/X86InstrFPStack.td
index 0d0a4a6ba5..32811e7383 100644
--- a/lib/Target/X86/X86InstrFPStack.td
+++ b/lib/Target/X86/X86InstrFPStack.td
@@ -607,8 +607,8 @@ let mayLoad = 1 in
def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
(outs), (ins i16mem:$dst), "fldcw\t$dst", []>;
-// Register free
-
+// FPU control instructions
+def FNINIT : I<0xE3, RawFrm, (outs), (ins), "fninit", []>, DB;
def FFREE : FPI<0xC0, AddRegFrm, (outs), (ins RST:$reg),
"ffree\t$reg">, DD;
@@ -616,7 +616,8 @@ def FFREE : FPI<0xC0, AddRegFrm, (outs), (ins RST:$reg),
def FNCLEX : I<0xE2, RawFrm, (outs), (ins), "fnclex", []>, DB;
-// Operandless floating-point instructions for the disassembler
+// Operandless floating-point instructions for the disassembler.
+def WAIT : I<0x9B, RawFrm, (outs), (ins), "wait", []>;
def FNOP : I<0xD0, RawFrm, (outs), (ins), "fnop", []>, D9;
def FXAM : I<0xE5, RawFrm, (outs), (ins), "fxam", []>, D9;