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author | Chris Lattner <sabre@nondot.org> | 2010-07-08 22:41:28 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-07-08 22:41:28 +0000 |
commit | ac0ed5dc082dff9ce359af5422f5b82047b4fe6b (patch) | |
tree | 7a21f121acf50636eed9bb3da33c97f9be597a7a /lib/Target/X86/X86InstrInfo.h | |
parent | 0afbf23453a7ea2ed2705ca350ea64629852558c (diff) | |
download | llvm-ac0ed5dc082dff9ce359af5422f5b82047b4fe6b.tar.gz llvm-ac0ed5dc082dff9ce359af5422f5b82047b4fe6b.tar.bz2 llvm-ac0ed5dc082dff9ce359af5422f5b82047b4fe6b.tar.xz |
add some long-overdue enums to refer to the parts of the 5-operand
X86 memory operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107925 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.h')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index fc8e362fda..b3e2e94606 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -24,6 +24,24 @@ namespace llvm { class X86TargetMachine; namespace X86 { + // Enums for memory operand decoding. Each memory operand is represented with + // a 5 operand sequence in the form: + // [BaseReg, ScaleAmt, IndexReg, Disp, Segment] + // These enums help decode this. + enum { + AddrBaseReg = 0, + AddrScaleAmt = 1, + AddrIndexReg = 2, + AddrDisp = 3, + + /// AddrSegmentReg - The operand # of the segment in the memory operand. + AddrSegmentReg = 4, + + /// AddrNumOperands - Total number of operands in a memory reference. + AddrNumOperands = 5 + }; + + // X86 specific condition code. These correspond to X86_*_COND in // X86InstrInfo.td. They must be kept in synch. enum CondCode { @@ -542,12 +560,6 @@ namespace X86II { } } -// FIXME: Move into X86II namespace. -enum { - X86AddrSegment = 4, - X86AddrNumOperands = 5 -}; - inline static bool isScale(const MachineOperand &MO) { return MO.isImm() && (MO.getImm() == 1 || MO.getImm() == 2 || |