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author | Chris Lattner <sabre@nondot.org> | 2010-02-23 02:07:48 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-02-23 02:07:48 +0000 |
commit | 8f2b4cc07161b56e56d6615761ea4ba08dc0e7d3 (patch) | |
tree | 25e3800316d0b439fa97b868cbfa37a694c30db3 /lib/Target/X86/X86InstrMMX.td | |
parent | 363ac58263dc4ce7c380bbaddb64f90b507fb16d (diff) | |
download | llvm-8f2b4cc07161b56e56d6615761ea4ba08dc0e7d3.tar.gz llvm-8f2b4cc07161b56e56d6615761ea4ba08dc0e7d3.tar.bz2 llvm-8f2b4cc07161b56e56d6615761ea4ba08dc0e7d3.tar.xz |
X86InstrInfoSSE.td declares PINSRW as having type v8i16,
don't alis it in the MMX .td file with a different width,
split into two X86ISD opcodes. This fixes an x86 testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96859 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrMMX.td')
-rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index 89f020cc72..e9d9539aba 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -426,13 +426,15 @@ def MMX_CVTTPS2PIrm : MMXI<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src), // Extract / Insert -def MMX_X86pextrw : SDNode<"X86ISD::PEXTRW", SDTypeProfile<1, 2, []>, []>; -def MMX_X86pinsrw : SDNode<"X86ISD::PINSRW", SDTypeProfile<1, 3, []>, []>; +def MMX_X86pinsrw : SDNode<"X86ISD::MMX_PINSRW", + SDTypeProfile<1, 3, [SDTCisVT<0, v4i16>, SDTCisSameAs<0,1>, + SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>; + def MMX_PEXTRWri : MMXIi8<0xC5, MRMSrcReg, (outs GR32:$dst), (ins VR64:$src1, i16i8imm:$src2), "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}", - [(set GR32:$dst, (MMX_X86pextrw (v4i16 VR64:$src1), + [(set GR32:$dst, (X86pextrw (v4i16 VR64:$src1), (iPTR imm:$src2)))]>; let Constraints = "$src1 = $dst" in { def MMX_PINSRWrri : MMXIi8<0xC4, MRMSrcReg, |