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| author | Michael Liao <michael.liao@intel.com> | 2013-04-11 04:52:28 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-04-11 04:52:28 +0000 |
| commit | 02d2e612521954b5ff7c1ba6fd53e36bc51e1c48 (patch) | |
| tree | af6fc7afc6bc91ff6926a48e7819b9538dc1bf68 /lib/Target/X86/X86InstrSystem.td | |
| parent | 959ddbb5e0e088f4d5c3f8c015de3caf0baa6e6c (diff) | |
| download | llvm-02d2e612521954b5ff7c1ba6fd53e36bc51e1c48.tar.gz llvm-02d2e612521954b5ff7c1ba6fd53e36bc51e1c48.tar.bz2 llvm-02d2e612521954b5ff7c1ba6fd53e36bc51e1c48.tar.xz | |
Add CLAC/STAC instruction encoding/decoding support
As these two instructions in AVX extension are privileged instructions for
special purpose, it's only expected to be used in inlined assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrSystem.td')
| -rw-r--r-- | lib/Target/X86/X86InstrSystem.td | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td index 869304d1b4..bab3cdd000 100644 --- a/lib/Target/X86/X86InstrSystem.td +++ b/lib/Target/X86/X86InstrSystem.td @@ -520,3 +520,10 @@ def INVPCID32 : I<0x82, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2), def INVPCID64 : I<0x82, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2), "invpcid\t{$src2, $src1|$src1, $src2}", []>, OpSize, T8, Requires<[In64BitMode]>; + +//===----------------------------------------------------------------------===// +// SMAP Instruction +let Defs = [EFLAGS], Uses = [EFLAGS] in { + def CLAC : I<0x01, MRM_CA, (outs), (ins), "clac", []>, TB; + def STAC : I<0x01, MRM_CB, (outs), (ins), "stac", []>, TB; +} |