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| author | Kevin Enderby <enderby@apple.com> | 2010-10-19 00:01:44 +0000 |
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2010-10-19 00:01:44 +0000 |
| commit | 87f4a1a4331e40cbba28e829561759d146273840 (patch) | |
| tree | 689fe4783bac8b23dcf1f80bd5cebba766b08781 /lib/Target/X86/X86InstrSystem.td | |
| parent | 70987fbc60a8e6788668f44eba56c34ef17c7672 (diff) | |
| download | llvm-87f4a1a4331e40cbba28e829561759d146273840.tar.gz llvm-87f4a1a4331e40cbba28e829561759d146273840.tar.bz2 llvm-87f4a1a4331e40cbba28e829561759d146273840.tar.xz | |
Added a few tweaks to the Intel Descriptor-table support instructions to allow
word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes. This is again for use just with assembly source for llvm-mc .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrSystem.td')
| -rw-r--r-- | lib/Target/X86/X86InstrSystem.td | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td index 2d27209f5f..48b6d6ecf0 100644 --- a/lib/Target/X86/X86InstrSystem.td +++ b/lib/Target/X86/X86InstrSystem.td @@ -321,8 +321,12 @@ def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg), //===----------------------------------------------------------------------===// // Descriptor-table support instructions +def SGDT16m : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins), + "sgdtw\t$dst", []>, TB, OpSize, Requires<[In32BitMode]>; def SGDTm : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins), "sgdt\t$dst", []>, TB; +def SIDT16m : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins), + "sidtw\t$dst", []>, TB, OpSize, Requires<[In32BitMode]>; def SIDTm : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins), "sidt\t$dst", []>, TB; def SLDT16r : I<0x00, MRM0r, (outs GR16:$dst), (ins), @@ -339,8 +343,12 @@ def SLDT64r : RI<0x00, MRM0r, (outs GR64:$dst), (ins), def SLDT64m : RI<0x00, MRM0m, (outs i16mem:$dst), (ins), "sldt{q}\t$dst", []>, TB; +def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), + "lgdtw\t$src", []>, TB, OpSize, Requires<[In32BitMode]>; def LGDTm : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), "lgdt\t$src", []>, TB; +def LIDT16m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src), + "lidtw\t$src", []>, TB, OpSize, Requires<[In32BitMode]>; def LIDTm : I<0x01, MRM3m, (outs), (ins opaque48mem:$src), "lidt\t$src", []>, TB; def LLDT16r : I<0x00, MRM2r, (outs), (ins GR16:$src), |