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| author | Chris Lattner <sabre@nondot.org> | 2010-07-05 04:38:33 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-07-05 04:38:33 +0000 |
| commit | a5b412581c09f634eb2983965fbbe8790ae4817f (patch) | |
| tree | 11010f9f5ca35f9573856c8514510364e7421970 /lib/Target/X86/X86RegisterInfo.td | |
| parent | 39aa20a981863be788649254f8f40a2e57cb6131 (diff) | |
| download | llvm-a5b412581c09f634eb2983965fbbe8790ae4817f.tar.gz llvm-a5b412581c09f634eb2983965fbbe8790ae4817f.tar.bz2 llvm-a5b412581c09f634eb2983965fbbe8790ae4817f.tar.xz | |
rip out even more sporadic v2f32 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107610 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86RegisterInfo.td')
| -rw-r--r-- | lib/Target/X86/X86RegisterInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index 91cfaa977e..d0e0db16a2 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -780,7 +780,7 @@ def RST : RegisterClass<"X86", [f80, f64, f32], 32, } // Generic vector registers: VR64 and VR128. -def VR64 : RegisterClass<"X86", [v8i8, v4i16, v2i32, v1i64, v2f32], 64, +def VR64 : RegisterClass<"X86", [v8i8, v4i16, v2i32, v1i64], 64, [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7]>; def VR128 : RegisterClass<"X86", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],128, [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, |