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| author | Ben Langmuir <ben.langmuir@intel.com> | 2013-09-12 15:51:31 +0000 |
|---|---|---|
| committer | Ben Langmuir <ben.langmuir@intel.com> | 2013-09-12 15:51:31 +0000 |
| commit | 1f1bd9a54d25d4e2c5da13c2cae7fa5e3d8acc9f (patch) | |
| tree | 6a4093eec10f724f5f8bc99e58474ecfa2ec66e8 /lib/Target/X86/X86Subtarget.cpp | |
| parent | c0b12dfd0a83081c1ebbb55a89c7a2c1f98f1842 (diff) | |
| download | llvm-1f1bd9a54d25d4e2c5da13c2cae7fa5e3d8acc9f.tar.gz llvm-1f1bd9a54d25d4e2c5da13c2cae7fa5e3d8acc9f.tar.bz2 llvm-1f1bd9a54d25d4e2c5da13c2cae7fa5e3d8acc9f.tar.xz | |
Partial support for Intel SHA Extensions (sha1rnds4)
Add basic assembly/disassembly support for the first Intel SHA
instruction 'sha1rnds4'. Also includes feature flag, and test cases.
Support for the remaining instructions will follow in a separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190611 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Subtarget.cpp')
| -rw-r--r-- | lib/Target/X86/X86Subtarget.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index a887b81874..0c8e2c5e40 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -375,6 +375,10 @@ void X86Subtarget::AutoDetectSubtargetFeatures() { HasCDI = true; ToggleFeature(X86::FeatureCDI); } + if (IsIntel && ((EBX >> 29) & 0x1)) { + HasSHA = true; + ToggleFeature(X86::FeatureSHA); + } } } } @@ -497,6 +501,7 @@ void X86Subtarget::initializeEnvironment() { HasCDI = false; HasPFI = false; HasADX = false; + HasSHA = false; HasPRFCHW = false; HasRDSEED = false; IsBTMemSlow = false; |