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authorEvan Cheng <evan.cheng@apple.com>2012-02-07 22:50:41 +0000
committerEvan Cheng <evan.cheng@apple.com>2012-02-07 22:50:41 +0000
commitde1df103b9c578d0a1609054a5944342c5d0ba23 (patch)
treeebcae362ebc8246f1792d6c2d7792d0b6cf034d3 /lib/Target/X86/X86Subtarget.h
parent0ae2510ea00454af29c6fc3f4b012e35d5f5d431 (diff)
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Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150008 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Subtarget.h')
-rw-r--r--lib/Target/X86/X86Subtarget.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h
index f930806be6..9e8b3f98d8 100644
--- a/lib/Target/X86/X86Subtarget.h
+++ b/lib/Target/X86/X86Subtarget.h
@@ -132,6 +132,10 @@ protected:
/// this is true for most x86-64 chips, but not the first AMD chips.
bool HasCmpxchg16b;
+ /// UseLeaForSP - True if the LEA instruction should be used for adjusting
+ /// the stack pointer. This is an optimization for Intel Atom processors.
+ bool UseLeaForSP;
+
/// PostRAScheduler - True if using post-register-allocation scheduler.
bool PostRAScheduler;
@@ -214,6 +218,7 @@ public:
bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
bool hasVectorUAMem() const { return HasVectorUAMem; }
bool hasCmpxchg16b() const { return HasCmpxchg16b; }
+ bool useLeaForSP() const { return UseLeaForSP; }
bool isAtom() const { return X86ProcFamily == IntelAtom; }