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author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-11-05 17:15:56 +0000 |
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committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-11-05 17:15:56 +0000 |
commit | cfe09ed28d8a65b671e8b7a716a933e98e810e32 (patch) | |
tree | d1c325aa31dce3c96886c539334e039dba063bcc /lib/Target | |
parent | 08f9c8d7761f6857ffb86da7a17e9a94a9629ba5 (diff) | |
download | llvm-cfe09ed28d8a65b671e8b7a716a933e98e810e32.tar.gz llvm-cfe09ed28d8a65b671e8b7a716a933e98e810e32.tar.bz2 llvm-cfe09ed28d8a65b671e8b7a716a933e98e810e32.tar.xz |
[PATCH] PowerPC: Expand load extend vector operations
This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for
vector types when altivec is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167386 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 8d46e96e4d..0922011d97 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -361,6 +361,16 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand); setOperationAction(ISD::CTTZ, VT, Expand); setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); + setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand); + + for (unsigned j = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; + j <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++j) { + MVT::SimpleValueType InnerVT = (MVT::SimpleValueType)j; + setTruncStoreAction(VT, InnerVT, Expand); + } + setLoadExtAction(ISD::SEXTLOAD, VT, Expand); + setLoadExtAction(ISD::ZEXTLOAD, VT, Expand); + setLoadExtAction(ISD::EXTLOAD, VT, Expand); } for (unsigned i = (unsigned)MVT::FIRST_FP_VECTOR_VALUETYPE; |