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authorEvan Cheng <evan.cheng@apple.com>2008-11-12 07:34:37 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-11-12 07:34:37 +0000
commit706329143d0cbe83684275417c514725aab773e9 (patch)
tree9543786ec81c1b46b19306ca97378dce0a35bd6f /lib/Target
parent3c4a4ffa3dba5e3c7a0900d0bafe28d7095f3ada (diff)
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Fix address mode 3 immediate offset mode encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59109 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp10
-rw-r--r--lib/Target/ARM/ARMInstrInfo.h2
2 files changed, 7 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index c842a961ef..e877aa707a 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -736,11 +736,11 @@ void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
// Set bit[3:0] to the corresponding Rm register
Binary |= ARMRegisterInfo::getRegisterNumbering(MO2.getReg());
- // if this instr is in scaled register offset/index instruction, set
+ // If this instr is in scaled register offset/index instruction, set
// shift_immed(bit[11:7]) and shift(bit[6:5]) fields.
if (unsigned ShImm = ARM_AM::getAM2Offset(AM2Opc)) {
- Binary |= getShiftOp(AM2Opc) << 5; // shift
- Binary |= ShImm << 7; // shift_immed
+ Binary |= getShiftOp(AM2Opc) << ARMII::ShiftImmShift; // shift
+ Binary |= ShImm << ARMII::ShiftShift; // shift_immed
}
emitWordLE(Binary);
@@ -792,8 +792,8 @@ void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
Binary |= 1 << ARMII::AM3_I_BitShift;
if (unsigned ImmOffs = ARM_AM::getAM3Offset(AM3Opc)) {
// Set operands
- Binary |= (ImmOffs >> 4) << 8; // immedH
- Binary |= (ImmOffs & ~0xF); // immedL
+ Binary |= (ImmOffs >> 4) << ARMII::ImmHiShift; // immedH
+ Binary |= (ImmOffs & 0xF); // immedL
}
emitWordLE(Binary);
diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h
index 4a0065dce5..1ef965c555 100644
--- a/lib/Target/ARM/ARMInstrInfo.h
+++ b/lib/Target/ARM/ARMInstrInfo.h
@@ -116,8 +116,10 @@ namespace ARMII {
// Field shifts - such shifts are used to set field while generating
// machine instructions.
M_BitShift = 5,
+ ShiftImmShift = 5,
ShiftShift = 7,
N_BitShift = 7,
+ ImmHiShift = 8,
SoRotImmShift = 8,
RegRsShift = 8,
ExtRotImmShift = 10,