Rename PrintableName to Name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 3 insertions, 3 deletions

diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp
index b050debb46..3481414c7a 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -334,6 +334,6 @@ int AlphaRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
 
 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
 {
-  std::string s(RegisterDescriptors[reg].PrintableName);
+  std::string s(RegisterDescriptors[reg].Name);
   return s;
 }
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td
index 3d55969dd0..b71e580d7e 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -25,7 +25,7 @@ class GPR<bits<5> num, string n> : PPCReg<n> {
 class GP8<GPR SubReg, string n> : PPCReg<SubReg.AsmName> {
   field bits<5> Num = SubReg.Num;
   let SubRegs = [SubReg];
-  let PrintableName = n;
+  let Name = n;
 }
 
 // SPR - One of the 32-bit special-purpose registers
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 47efd5eb2b..cebac7a263 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -26,7 +26,7 @@ class RegisterClass; // Forward def
 class Register<string n> {
   string Namespace = "";
   string AsmName = n;
-  string PrintableName = n;
+  string Name = n;
 
   // SpillSize - If this value is set to a non-zero value, it is the size in
   // bits of the spill slot required to hold this register.  If this value is