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author | Nadav Rotem <nrotem@apple.com> | 2013-10-18 23:38:13 +0000 |
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committer | Nadav Rotem <nrotem@apple.com> | 2013-10-18 23:38:13 +0000 |
commit | fe16848601bdde6e3a5e0860199169dd171222a4 (patch) | |
tree | 0c3d115f34bda11ee30034050502f1504505c6a9 /lib/Target | |
parent | f47ffe08f9e4c51a8650e69c0964f656c0a582c1 (diff) | |
download | llvm-fe16848601bdde6e3a5e0860199169dd171222a4.tar.gz llvm-fe16848601bdde6e3a5e0860199169dd171222a4.tar.bz2 llvm-fe16848601bdde6e3a5e0860199169dd171222a4.tar.xz |
Mark some command line flags as hidden
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193013 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/MSP430/MSP430ISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 4 | ||||
-rw-r--r-- | lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 8 | ||||
-rw-r--r-- | lib/Target/NVPTX/NVVMReflect.cpp | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 4 |
5 files changed, 11 insertions, 11 deletions
diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index 5ac98374a2..745cdf5bc7 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -45,7 +45,7 @@ typedef enum { } HWMultUseMode; static cl::opt<HWMultUseMode> -HWMultMode("msp430-hwmult-mode", +HWMultMode("msp430-hwmult-mode", cl::Hidden, cl::desc("Hardware multiplier use mode"), cl::init(HWMultNoIntr), cl::values( diff --git a/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/lib/Target/NVPTX/NVPTXAsmPrinter.cpp index 5e39b59a65..0dcc70d238 100644 --- a/lib/Target/NVPTX/NVPTXAsmPrinter.cpp +++ b/lib/Target/NVPTX/NVPTXAsmPrinter.cpp @@ -53,14 +53,14 @@ bool RegAllocNilUsed = true; #define DEPOTNAME "__local_depot" static cl::opt<bool> -EmitLineNumbers("nvptx-emit-line-numbers", +EmitLineNumbers("nvptx-emit-line-numbers", cl::Hidden, cl::desc("NVPTX Specific: Emit Line numbers even without -G"), cl::init(true)); namespace llvm { bool InterleaveSrcInPtx = false; } static cl::opt<bool, true> -InterleaveSrc("nvptx-emit-src", cl::ZeroOrMore, +InterleaveSrc("nvptx-emit-src", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specific: Emit source line in ptx file"), cl::location(llvm::InterleaveSrcInPtx)); diff --git a/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp b/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp index 68fa95519b..4b8b306a70 100644 --- a/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp +++ b/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp @@ -26,24 +26,24 @@ using namespace llvm; static cl::opt<int> -FMAContractLevel("nvptx-fma-level", cl::ZeroOrMore, +FMAContractLevel("nvptx-fma-level", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specific: FMA contraction (0: don't do it" " 1: do it 2: do it aggressively"), cl::init(2)); static cl::opt<int> UsePrecDivF32( - "nvptx-prec-divf32", cl::ZeroOrMore, + "nvptx-prec-divf32", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use" " IEEE Compliant F32 div.rnd if avaiable."), cl::init(2)); static cl::opt<bool> -UsePrecSqrtF32("nvptx-prec-sqrtf32", +UsePrecSqrtF32("nvptx-prec-sqrtf32", cl::Hidden, cl::desc("NVPTX Specific: 0 use sqrt.approx, 1 use sqrt.rn."), cl::init(true)); static cl::opt<bool> -FtzEnabled("nvptx-f32ftz", cl::ZeroOrMore, +FtzEnabled("nvptx-f32ftz", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specific: Flush f32 subnormals to sign-preserving zero."), cl::init(false)); diff --git a/lib/Target/NVPTX/NVVMReflect.cpp b/lib/Target/NVPTX/NVVMReflect.cpp index 3cc324b85e..7406207c94 100644 --- a/lib/Target/NVPTX/NVVMReflect.cpp +++ b/lib/Target/NVPTX/NVVMReflect.cpp @@ -79,7 +79,7 @@ ModulePass *llvm::createNVVMReflectPass(const StringMap<int>& Mapping) { } static cl::opt<bool> -NVVMReflectEnabled("nvvm-reflect-enable", cl::init(true), +NVVMReflectEnabled("nvvm-reflect-enable", cl::init(true), cl::Hidden, cl::desc("NVVM reflection, enabled by default")); char NVVMReflect::ID = 0; @@ -88,7 +88,7 @@ INITIALIZE_PASS(NVVMReflect, "nvvm-reflect", false) static cl::list<std::string> -ReflectList("nvvm-reflect-list", cl::value_desc("name=<int>"), +ReflectList("nvvm-reflect-list", cl::value_desc("name=<int>"), cl::Hidden, cl::desc("A list of string=num assignments"), cl::ValueRequired); diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 81423a3ef4..ddf580f731 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -114,14 +114,14 @@ X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, // Command line options for x86 //===----------------------------------------------------------------------===// static cl::opt<bool> -UseVZeroUpper("x86-use-vzeroupper", +UseVZeroUpper("x86-use-vzeroupper", cl::Hidden, cl::desc("Minimize AVX to SSE transition penalty"), cl::init(true)); // Temporary option to control early if-conversion for x86 while adding machine // models. static cl::opt<bool> -X86EarlyIfConv("x86-early-ifcvt", +X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, cl::desc("Enable early if-conversion on X86")); //===----------------------------------------------------------------------===// |