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authorBenjamin Kramer <benny.kra@googlemail.com>2013-05-09 16:32:32 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2013-05-09 16:32:32 +0000
commita6ff92a975f2d6ef6a0db7aeaee3ee9fd046307a (patch)
tree26ad2cbb1ac595d2837ddec0bbfd14ef507b1dca /lib/Transforms
parent4fcf82f3163f34ddc5c659ceb20e87057a287e10 (diff)
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InstCombine: Don't just copy known bits from the first operand of an srem.
That's obviously wrong. Conservatively restrict it to the sign bit, which matches the original intention of this analysis. Fixes PR15940. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181518 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms')
-rw-r--r--lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 8add1ea618..a7bfe0965b 100644
--- a/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -754,7 +754,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
ComputeMaskedBits(I->getOperand(0), LHSKnownZero, LHSKnownOne, Depth+1);
// If it's known zero, our sign bit is also zero.
if (LHSKnownZero.isNegative())
- KnownZero |= LHSKnownZero;
+ KnownZero.setBit(KnownZero.getBitWidth() - 1);
}
break;
case Instruction::URem: {