diff options
author | Evan Cheng <evan.cheng@apple.com> | 2011-07-22 21:58:54 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-22 21:58:54 +0000 |
commit | e78085a3c03de648a481e9751c3094c517bd7123 (patch) | |
tree | 9e10b62529d26843c940ed08bcb7e53ef2073cde /lib | |
parent | 668274645476eb6a4be1ceef81d756c7095bb5ac (diff) | |
download | llvm-e78085a3c03de648a481e9751c3094c517bd7123.tar.gz llvm-e78085a3c03de648a481e9751c3094c517bd7123.tar.bz2 llvm-e78085a3c03de648a481e9751c3094c517bd7123.tar.xz |
Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
17 files changed, 239 insertions, 300 deletions
diff --git a/lib/MC/MCDisassembler/Disassembler.cpp b/lib/MC/MCDisassembler/Disassembler.cpp index 4c92c57a25..dd20f63193 100644 --- a/lib/MC/MCDisassembler/Disassembler.cpp +++ b/lib/MC/MCDisassembler/Disassembler.cpp @@ -37,9 +37,7 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo, LLVMSymbolLookupCallback SymbolLookUp) { // Initialize targets and assembly printers/parsers. llvm::InitializeAllTargetInfos(); - llvm::InitializeAllMCAsmInfos(); - llvm::InitializeAllMCCodeGenInfos(); - llvm::InitializeAllMCRegisterInfos(); + llvm::InitializeAllTargetMCs(); llvm::InitializeAllAsmPrinters(); llvm::InitializeAllAsmParsers(); llvm::InitializeAllDisassemblers(); diff --git a/lib/MC/MCDisassembler/EDDisassembler.cpp b/lib/MC/MCDisassembler/EDDisassembler.cpp index cae54164ed..3c5eadc608 100644 --- a/lib/MC/MCDisassembler/EDDisassembler.cpp +++ b/lib/MC/MCDisassembler/EDDisassembler.cpp @@ -108,10 +108,7 @@ void EDDisassembler::initialize() { InitializeAllTargetInfos(); InitializeAllTargets(); - InitializeAllMCCodeGenInfos(); - InitializeAllMCAsmInfos(); - InitializeAllMCRegisterInfos(); - InitializeAllMCSubtargetInfos(); + InitializeAllTargetMCs(); InitializeAllAsmPrinters(); InitializeAllAsmParsers(); InitializeAllDisassemblers(); @@ -178,6 +175,7 @@ EDDisassembler::EDDisassembler(CPUKey &key) : TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU, featureString)); + // FIXME: It shouldn't be using TargetRegisterInfo! const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo(); if (!registerInfo) diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index e64902ccfd..dc8103d491 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -98,36 +98,18 @@ MCSubtargetInfo *ARM_MC::createARMMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -// Force static initialization. -extern "C" void LLVMInitializeARMMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget, - ARM_MC::createARMMCSubtargetInfo); - TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget, - ARM_MC::createARMMCSubtargetInfo); -} - static MCInstrInfo *createARMMCInstrInfo() { MCInstrInfo *X = new MCInstrInfo(); InitARMMCInstrInfo(X); return X; } -extern "C" void LLVMInitializeARMMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo); - TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo); -} - static MCRegisterInfo *createARMMCRegisterInfo(StringRef Triple) { MCRegisterInfo *X = new MCRegisterInfo(); InitARMMCRegisterInfo(X, ARM::LR); return X; } -extern "C" void LLVMInitializeARMMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo); - TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo); -} - static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) { Triple TheTriple(TT); @@ -137,12 +119,6 @@ static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) { return new ARMELFMCAsmInfo(); } -extern "C" void LLVMInitializeARMMCAsmInfo() { - // Register the target asm info. - RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo); - RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo); -} - MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -152,7 +128,27 @@ MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeARMMCCodeGenInfo() { +// Force static initialization. +extern "C" void LLVMInitializeARMTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo); + RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheARMTarget, createARMMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(TheThumbTarget, createARMMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo); + TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo); + TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget, + ARM_MC::createARMMCSubtargetInfo); + TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget, + ARM_MC::createARMMCSubtargetInfo); } diff --git a/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp b/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp index 517ab18283..d6f3e90d73 100644 --- a/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp +++ b/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp @@ -36,20 +36,12 @@ static MCInstrInfo *createAlphaMCInstrInfo() { return X; } -extern "C" void LLVMInitializeAlphaMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo); -} - static MCRegisterInfo *createAlphaMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitAlphaMCRegisterInfo(X, Alpha::R26); return X; } -extern "C" void LLVMInitializeAlphaMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo); -} - static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -57,15 +49,6 @@ static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializeAlphaMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget, - createAlphaMCSubtargetInfo); -} - -extern "C" void LLVMInitializeAlphaMCAsmInfo() { - RegisterMCAsmInfo<AlphaMCAsmInfo> X(TheAlphaTarget); -} - MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -73,8 +56,22 @@ MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeAlphaMCCodeGenInfo() { +// Force static initialization. +extern "C" void LLVMInitializeAlphaTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfo<AlphaMCAsmInfo> X(TheAlphaTarget); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget, createAlphaMCCodeGenInfo); -} + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget, + createAlphaMCSubtargetInfo); +} diff --git a/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp b/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp index 5b69a0f1ba..32a21b8390 100644 --- a/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp +++ b/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp @@ -36,22 +36,12 @@ static MCInstrInfo *createBlackfinMCInstrInfo() { return X; } -extern "C" void LLVMInitializeBlackfinMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheBlackfinTarget, - createBlackfinMCInstrInfo); -} - static MCRegisterInfo *createBlackfinMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitBlackfinMCRegisterInfo(X, BF::RETS); return X; } -extern "C" void LLVMInitializeBlackfinMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget, - createBlackfinMCRegisterInfo); -} - static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { @@ -60,15 +50,6 @@ static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT, return X; } -extern "C" void LLVMInitializeBlackfinMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheBlackfinTarget, - createBlackfinMCSubtargetInfo); -} - -extern "C" void LLVMInitializeBlackfinMCAsmInfo() { - RegisterMCAsmInfo<BlackfinMCAsmInfo> X(TheBlackfinTarget); -} - MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -76,7 +57,24 @@ MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeBlackfinMCCodeGenInfo() { +// Force static initialization. +extern "C" void LLVMInitializeBlackfinTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfo<BlackfinMCAsmInfo> X(TheBlackfinTarget); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheBlackfinTarget, createBlackfinMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheBlackfinTarget, + createBlackfinMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget, + createBlackfinMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheBlackfinTarget, + createBlackfinMCSubtargetInfo); } diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index 3f43474b77..f24dd46aad 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -64,15 +64,7 @@ extern "C" void LLVMInitializeCBackendTarget() { RegisterTargetMachine<CTargetMachine> X(TheCBackendTarget); } -extern "C" void LLVMInitializeCBackendMCAsmInfo() {} - -extern "C" void LLVMInitializeCBackendMCRegisterInfo() {} - -extern "C" void LLVMInitializeCBackendMCInstrInfo() {} - -extern "C" void LLVMInitializeCBackendMCSubtargetInfo() {} - -extern "C" void LLVMInitializeCBackendMCCodeGenInfo() {} +extern "C" void LLVMInitializeCBackendTargetMC() {} namespace { class CBEMCAsmInfo : public MCAsmInfo { diff --git a/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp b/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp index 1e09276d9e..e88bbf306e 100644 --- a/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp +++ b/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp @@ -36,21 +36,12 @@ static MCInstrInfo *createSPUMCInstrInfo() { return X; } -extern "C" void LLVMInitializeCellSPUMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo); -} - static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitSPUMCRegisterInfo(X, SPU::R0); return X; } -extern "C" void LLVMInitializeCellSPUMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget, - createCellSPUMCRegisterInfo); -} - static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -58,11 +49,6 @@ static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializeCellSPUMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget, - createSPUMCSubtargetInfo); -} - static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) { MCAsmInfo *MAI = new SPULinuxMCAsmInfo(T, TT); @@ -74,10 +60,6 @@ static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) { return MAI; } -extern "C" void LLVMInitializeCellSPUMCAsmInfo() { - RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo); -} - MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -87,7 +69,23 @@ MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeCellSPUMCCodeGenInfo() { +// Force static initialization. +extern "C" void LLVMInitializeCellSPUTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheCellSPUTarget, createSPUMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget, + createCellSPUMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget, + createSPUMCSubtargetInfo); } diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp index cce0fa4a96..66c2ca2ed0 100644 --- a/lib/Target/CppBackend/CPPBackend.cpp +++ b/lib/Target/CppBackend/CPPBackend.cpp @@ -77,15 +77,7 @@ extern "C" void LLVMInitializeCppBackendTarget() { RegisterTargetMachine<CPPTargetMachine> X(TheCppBackendTarget); } -extern "C" void LLVMInitializeCppBackendMCAsmInfo() {} - -extern "C" void LLVMInitializeCppBackendMCRegisterInfo() {} - -extern "C" void LLVMInitializeCppBackendMCInstrInfo() {} - -extern "C" void LLVMInitializeCppBackendMCSubtargetInfo() {} - -extern "C" void LLVMInitializeCppBackendMCCodeGenInfo() {} +extern "C" void LLVMInitializeCppBackendTargetMC() {} namespace { typedef std::vector<Type*> TypeList; diff --git a/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp b/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp index aa4399b839..d42517005f 100644 --- a/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp +++ b/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp @@ -36,21 +36,12 @@ static MCInstrInfo *createMBlazeMCInstrInfo() { return X; } -extern "C" void LLVMInitializeMBlazeMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheMBlazeTarget, createMBlazeMCInstrInfo); -} - static MCRegisterInfo *createMBlazeMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitMBlazeMCRegisterInfo(X, MBlaze::R15); return X; } -extern "C" void LLVMInitializeMBlazeMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheMBlazeTarget, - createMBlazeMCRegisterInfo); -} - static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -58,11 +49,6 @@ static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializeMBlazeMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget, - createMBlazeMCSubtargetInfo); -} - static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { Triple TheTriple(TT); switch (TheTriple.getOS()) { @@ -71,10 +57,6 @@ static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { } } -extern "C" void LLVMInitializeMBlazeMCAsmInfo() { - RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo); -} - MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -86,7 +68,23 @@ MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeMBlazeMCCodeGenInfo() { +// Force static initialization. +extern "C" void LLVMInitializeMBlazeTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheMBlazeTarget, createMBlazeMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheMBlazeTarget, createMBlazeMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheMBlazeTarget, + createMBlazeMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget, + createMBlazeMCSubtargetInfo); } diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp b/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp index 60b80c3607..393a6324c1 100644 --- a/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp +++ b/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp @@ -35,22 +35,12 @@ static MCInstrInfo *createMSP430MCInstrInfo() { return X; } -extern "C" void LLVMInitializeMSP430MCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo); -} - - static MCRegisterInfo *createMSP430MCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitMSP430MCRegisterInfo(X, MSP430::PCW); return X; } -extern "C" void LLVMInitializeMSP430MCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheMSP430Target, - createMSP430MCRegisterInfo); -} - static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -58,15 +48,6 @@ static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializeMSP430MCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target, - createMSP430MCSubtargetInfo); -} - -extern "C" void LLVMInitializeMSP430MCAsmInfo() { - RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target); -} - MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -74,7 +55,22 @@ MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeMSP430MCCodeGenInfo() { +extern "C" void LLVMInitializeMSP430TargetMC() { + // Register the MC asm info. + RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheMSP430Target, createMSP430MCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheMSP430Target, + createMSP430MCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target, + createMSP430MCSubtargetInfo); } diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index a4d6dcfc88..deb32d194d 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -36,21 +36,12 @@ static MCInstrInfo *createMipsMCInstrInfo() { return X; } -extern "C" void LLVMInitializeMipsMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo); -} - static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitMipsMCRegisterInfo(X, Mips::RA); return X; } -extern "C" void LLVMInitializeMipsMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo); - TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo); -} - static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -58,11 +49,6 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializeMipsMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget, - createMipsMCSubtargetInfo); -} - static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) { MCAsmInfo *MAI = new MipsMCAsmInfo(T, TT); @@ -73,11 +59,6 @@ static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) { return MAI; } -extern "C" void LLVMInitializeMipsMCAsmInfo() { - RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo); - RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo); -} - MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -93,9 +74,25 @@ MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeMipsMCCodeGenInfo() { +extern "C" void LLVMInitializeMipsTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo); + RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget, createMipsMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget, createMipsMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo); + TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget, + createMipsMCSubtargetInfo); } diff --git a/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp b/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp index 84f472f74e..e3ea1ffdaf 100644 --- a/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp +++ b/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp @@ -35,11 +35,6 @@ static MCInstrInfo *createPTXMCInstrInfo() { return X; } -extern "C" void LLVMInitializePTXMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo); - TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo); -} - static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); // PTX does not have a return address register. @@ -47,11 +42,6 @@ static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) { return X; } -extern "C" void LLVMInitializePTXMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo); - TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo); -} - static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -59,18 +49,6 @@ static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializePTXMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target, - createPTXMCSubtargetInfo); - TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target, - createPTXMCSubtargetInfo); -} - -extern "C" void LLVMInitializePTXMCAsmInfo() { - RegisterMCAsmInfo<PTXMCAsmInfo> X(ThePTX32Target); - RegisterMCAsmInfo<PTXMCAsmInfo> Y(ThePTX64Target); -} - MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -78,7 +56,26 @@ MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializePTXMCCodeGenInfo() { +extern "C" void LLVMInitializePTXTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfo<PTXMCAsmInfo> X(ThePTX32Target); + RegisterMCAsmInfo<PTXMCAsmInfo> Y(ThePTX64Target); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(ThePTX32Target, createPTXMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(ThePTX64Target, createPTXMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo); + TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo); + TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target, + createPTXMCSubtargetInfo); + TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target, + createPTXMCSubtargetInfo); } diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp index c49fe3f788..feecd9ddbc 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp @@ -36,11 +36,6 @@ static MCInstrInfo *createPPCMCInstrInfo() { return X; } -extern "C" void LLVMInitializePowerPCMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo); - TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo); -} - static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) { Triple TheTriple(TT); bool isPPC64 = (TheTriple.getArch() == Triple::ppc64); @@ -52,11 +47,6 @@ static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) { return X; } -extern "C" void LLVMInitializePowerPCMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo); - TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo); -} - static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -64,13 +54,6 @@ static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializePowerPCMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target, - createPPCMCSubtargetInfo); - TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target, - createPPCMCSubtargetInfo); -} - static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) { Triple TheTriple(TT); bool isPPC64 = TheTriple.getArch() == Triple::ppc64; @@ -89,11 +72,6 @@ static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) { return MAI; } -extern "C" void LLVMInitializePowerPCMCAsmInfo() { - RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo); - RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo); -} - MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -109,7 +87,26 @@ MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializePowerPCMCCodeGenInfo() { +extern "C" void LLVMInitializePowerPCTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo); + RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo); + TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo); + TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target, + createPPCMCSubtargetInfo); + TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target, + createPPCMCSubtargetInfo); } diff --git a/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp b/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp index 28046bf5bc..59d909e3f6 100644 --- a/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp +++ b/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp @@ -35,20 +35,12 @@ static MCInstrInfo *createSparcMCInstrInfo() { return X; } -extern "C" void LLVMInitializeSparcMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo); -} - static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitSparcMCRegisterInfo(X, SP::I7); return X; } -extern "C" void LLVMInitializeSparcMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo); -} - static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -56,16 +48,6 @@ static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializeSparcMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget, - createSparcMCSubtargetInfo); -} - -extern "C" void LLVMInitializeSparcMCAsmInfo() { - RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget); - RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target); -} - MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -73,10 +55,24 @@ MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeSparcMCCodeGenInfo() { +extern "C" void LLVMInitializeSparcTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget); + RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget, createSparcMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target, createSparcMCCodeGenInfo); -} + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget, + createSparcMCSubtargetInfo); +} diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp b/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp index 57c3917c5b..fc7321660d 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp @@ -35,22 +35,12 @@ static MCInstrInfo *createSystemZMCInstrInfo() { return X; } -extern "C" void LLVMInitializeSystemZMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget, - createSystemZMCInstrInfo); -} - static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitSystemZMCRegisterInfo(X, 0); return X; } -extern "C" void LLVMInitializeSystemZMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheSystemZTarget, - createSystemZMCRegisterInfo); -} - static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { @@ -59,15 +49,6 @@ static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT, return X; } -extern "C" void LLVMInitializeSystemZMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget, - createSystemZMCSubtargetInfo); -} - -extern "C" void LLVMInitializeSystemZMCAsmInfo() { - RegisterMCAsmInfo<SystemZMCAsmInfo> X(TheSystemZTarget); -} - MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -77,7 +58,23 @@ MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeSystemZMCCodeGenInfo() { +extern "C" void LLVMInitializeSystemZTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfo<SystemZMCAsmInfo> X(TheSystemZTarget); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget, createSystemZMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget, + createSystemZMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheSystemZTarget, + createSystemZMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget, + createSystemZMCSubtargetInfo); } diff --git a/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp index 298de32dc1..471d4392f3 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp +++ b/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp @@ -261,25 +261,12 @@ MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -// Force static initialization. -extern "C" void LLVMInitializeX86MCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheX86_32Target, - X86_MC::createX86MCSubtargetInfo); - TargetRegistry::RegisterMCSubtargetInfo(TheX86_64Target, - X86_MC::createX86MCSubtargetInfo); -} - static MCInstrInfo *createX86MCInstrInfo() { MCInstrInfo *X = new MCInstrInfo(); InitX86MCInstrInfo(X); return X; } -extern "C" void LLVMInitializeX86MCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheX86_32Target, createX86MCInstrInfo); - TargetRegistry::RegisterMCInstrInfo(TheX86_64Target, createX86MCInstrInfo); -} - static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) { Triple TheTriple(TT); unsigned RA = (TheTriple.getArch() == Triple::x86_64) @@ -294,12 +281,6 @@ static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) { return X; } -extern "C" void LLVMInitializeX86MCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo); - TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo); -} - - static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) { Triple TheTriple(TT); bool is64Bit = TheTriple.getArch() == Triple::x86_64; @@ -333,12 +314,6 @@ static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) { return MAI; } -extern "C" void LLVMInitializeX86MCAsmInfo() { - // Register the target asm info. - RegisterMCAsmInfoFn A(TheX86_32Target, createX86MCAsmInfo); - RegisterMCAsmInfoFn B(TheX86_64Target, createX86MCAsmInfo); -} - MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -388,8 +363,27 @@ MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeX86MCCodeGenInfo() { - // Register the target asm info. - RegisterMCCodeGenInfoFn A(TheX86_32Target, createX86MCCodeGenInfo); - RegisterMCCodeGenInfoFn B(TheX86_64Target, createX86MCCodeGenInfo); +// Force static initialization. +extern "C" void LLVMInitializeX86TargetMC() { + // Register the MC asm info. + RegisterMCAsmInfoFn A(TheX86_32Target, createX86MCAsmInfo); + RegisterMCAsmInfoFn B(TheX86_64Target, createX86MCAsmInfo); + + // Register the MC codegen info. + RegisterMCCodeGenInfoFn C(TheX86_32Target, createX86MCCodeGenInfo); + RegisterMCCodeGenInfoFn D(TheX86_64Target, createX86MCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheX86_32Target, createX86MCInstrInfo); + TargetRegistry::RegisterMCInstrInfo(TheX86_64Target, createX86MCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo); + TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheX86_32Target, + X86_MC::createX86MCSubtargetInfo); + TargetRegistry::RegisterMCSubtargetInfo(TheX86_64Target, + X86_MC::createX86MCSubtargetInfo); } diff --git a/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp b/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp index f669d10c31..235053b59b 100644 --- a/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp +++ b/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp @@ -35,20 +35,12 @@ static MCInstrInfo *createXCoreMCInstrInfo() { return X; } -extern "C" void LLVMInitializeXCoreMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo); -} - static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) { MCRegisterInfo *X = new MCRegisterInfo(); InitXCoreMCRegisterInfo(X, XCore::LR); return X; } -extern "C" void LLVMInitializeXCoreMCRegisterInfo() { - TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo); -} - static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { MCSubtargetInfo *X = new MCSubtargetInfo(); @@ -56,11 +48,6 @@ static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializeXCoreMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget, - createXCoreMCSubtargetInfo); -} - static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) { MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT); @@ -72,10 +59,6 @@ static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) { return MAI; } -extern "C" void LLVMInitializeXCoreMCAsmInfo() { - RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo); -} - MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM) { MCCodeGenInfo *X = new MCCodeGenInfo(); @@ -83,7 +66,22 @@ MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } -extern "C" void LLVMInitializeXCoreMCCodeGenInfo() { +// Force static initialization. +extern "C" void LLVMInitializeXCoreTargetMC() { + // Register the MC asm info. + RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo); + + // Register the MC codegen info. TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget, createXCoreMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget, + createXCoreMCSubtargetInfo); } |