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author | Bill Wendling <isanbard@gmail.com> | 2013-05-21 20:21:23 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-05-21 20:21:23 +0000 |
commit | bb120a12ce66643a760eb863da9dde882fbe0313 (patch) | |
tree | e95e8757eb1a3b085d5b49c584c5c274e41a5ea4 /lib | |
parent | 5f5295224d58e17265177bac127563e605bf5cab (diff) | |
download | llvm-bb120a12ce66643a760eb863da9dde882fbe0313.tar.gz llvm-bb120a12ce66643a760eb863da9dde882fbe0313.tar.bz2 llvm-bb120a12ce66643a760eb863da9dde882fbe0313.tar.xz |
Merging r182112:
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r182112 | tstellar | 2013-05-17 08:23:12 -0700 (Fri, 17 May 2013) | 1 line
R600: Pass MCSubtargetInfo reference to R600CodeEmitter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182416 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 2 | ||||
-rw-r--r-- | lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h | 3 | ||||
-rw-r--r-- | lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 11 |
3 files changed, 10 insertions, 6 deletions
diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp b/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp index 6f66aa898a..61d70bb342 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp +++ b/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp @@ -78,7 +78,7 @@ static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) { return createSIMCCodeEmitter(MCII, MRI, STI, Ctx); } else { - return createR600MCCodeEmitter(MCII, MRI); + return createR600MCCodeEmitter(MCII, MRI, STI); } } diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h b/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h index 95c572c21b..abb032045b 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h +++ b/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h @@ -32,7 +32,8 @@ class raw_ostream; extern Target TheAMDGPUTarget; MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, - const MCRegisterInfo &MRI); + const MCRegisterInfo &MRI, + const MCSubtargetInfo &STI); MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, diff --git a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp b/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp index 6edd0efbdd..cb4cf0ce38 100644 --- a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp +++ b/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp @@ -35,11 +35,13 @@ class R600MCCodeEmitter : public AMDGPUMCCodeEmitter { void operator=(const R600MCCodeEmitter &) LLVM_DELETED_FUNCTION; const MCInstrInfo &MCII; const MCRegisterInfo &MRI; + const MCSubtargetInfo &STI; public: - R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri) - : MCII(mcii), MRI(mri) { } + R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri, + const MCSubtargetInfo &sti) + : MCII(mcii), MRI(mri), STI(sti) { } /// \brief Encode the instruction and write it to the OS. virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS, @@ -95,8 +97,9 @@ enum TextureTypes { }; MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII, - const MCRegisterInfo &MRI) { - return new R600MCCodeEmitter(MCII, MRI); + const MCRegisterInfo &MRI, + const MCSubtargetInfo &STI) { + return new R600MCCodeEmitter(MCII, MRI, STI); } void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, |