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authorTom Stellard <thomas.stellard@amd.com>2014-04-11 19:35:46 +0000
committerTom Stellard <thomas.stellard@amd.com>2014-04-11 19:35:46 +0000
commit7491fd31438d8eb6abe686a39832593584b354c3 (patch)
tree236e5ba804eec0d859767a07fcbfbe6757ff84f8 /lib
parent3830243b552fe87837f593a38d9623ee14b5261f (diff)
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Merging r201507:
------------------------------------------------------------------------ r201507 | craig.topper | 2014-02-17 05:03:43 -0500 (Mon, 17 Feb 2014) | 2 lines Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@206056 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/Disassembler/X86DisassemblerDecoder.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
index c81a85755f..16ee0d357b 100644
--- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
+++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
@@ -1065,6 +1065,7 @@ static int readSIB(struct InternalInstruction* insn) {
switch (base) {
case 0x5:
+ case 0xd:
switch (modFromModRM(insn->modRM)) {
case 0x0:
insn->eaDisplacement = EA_DISP_32;
@@ -1072,13 +1073,11 @@ static int readSIB(struct InternalInstruction* insn) {
break;
case 0x1:
insn->eaDisplacement = EA_DISP_8;
- insn->sibBase = (insn->addressSize == 4 ?
- SIB_BASE_EBP : SIB_BASE_RBP);
+ insn->sibBase = (SIBBase)(sibBaseBase + base);
break;
case 0x2:
insn->eaDisplacement = EA_DISP_32;
- insn->sibBase = (insn->addressSize == 4 ?
- SIB_BASE_EBP : SIB_BASE_RBP);
+ insn->sibBase = (SIBBase)(sibBaseBase + base);
break;
case 0x3:
debug("Cannot have Mod = 0b11 and a SIB byte");