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authorVikram S. Adve <vadve@cs.uiuc.edu>2003-08-14 20:45:56 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2003-08-14 20:45:56 +0000
commit891bd82e7987ae2de55efa9f3a6089bc478d9686 (patch)
treef157121ad086bd40baedf25a49e104195f9edf90 /lib
parent29255922300049cb8fd448ccae4edd0ec45eeacf (diff)
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Improvement to the previous fix: branch following a delay slot of
another delayed instr. would cause the later sanity-check (assertion) in PhyRegAlloc.cpp to fail, even though there is really no error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7848 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp8
-rw-r--r--lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp8
2 files changed, 10 insertions, 6 deletions
diff --git a/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp b/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
index 8cde6e1de7..764ec36f37 100644
--- a/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
+++ b/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
@@ -290,9 +290,11 @@ void FunctionLiveVarInfo::calcLiveVarSetsForBB(const BasicBlock *BB) {
for (unsigned i = 0; i < DS; ++i, ++fwdMII) {
assert(fwdMII != MIVec.end() && "Missing instruction in delay slot?");
MachineInstr* DelaySlotMI = *fwdMII;
- set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet);
- if (i+1 == DS)
- set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet);
+ if (! TM.getInstrInfo().isNop(DelaySlotMI->getOpCode())) {
+ set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet);
+ if (i+1 == DS)
+ set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet);
+ }
}
}
diff --git a/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp b/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp
index 8cde6e1de7..764ec36f37 100644
--- a/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp
+++ b/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp
@@ -290,9 +290,11 @@ void FunctionLiveVarInfo::calcLiveVarSetsForBB(const BasicBlock *BB) {
for (unsigned i = 0; i < DS; ++i, ++fwdMII) {
assert(fwdMII != MIVec.end() && "Missing instruction in delay slot?");
MachineInstr* DelaySlotMI = *fwdMII;
- set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet);
- if (i+1 == DS)
- set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet);
+ if (! TM.getInstrInfo().isNop(DelaySlotMI->getOpCode())) {
+ set_union(*MInst2LVSetBI[DelaySlotMI], *NewSet);
+ if (i+1 == DS)
+ set_union(*MInst2LVSetAI[DelaySlotMI], *NewSet);
+ }
}
}