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author | Peter Collingbourne <peter@pcc.me.uk> | 2011-10-06 01:51:51 +0000 |
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committer | Peter Collingbourne <peter@pcc.me.uk> | 2011-10-06 01:51:51 +0000 |
commit | de8f33c199f3bf2049b0b732169f2bd8717469c6 (patch) | |
tree | 4906ed892dbff03bbd44aae2eff9d7ec0c195755 /lib | |
parent | 930193cb5544bd010a0a2bc795c9006913e2c595 (diff) | |
download | llvm-de8f33c199f3bf2049b0b732169f2bd8717469c6.tar.gz llvm-de8f33c199f3bf2049b0b732169f2bd8717469c6.tar.bz2 llvm-de8f33c199f3bf2049b0b732169f2bd8717469c6.tar.xz |
Build system infrastructure for multiple tblgens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141266 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/CMakeLists.txt | 26 | ||||
-rw-r--r-- | lib/Target/Alpha/CMakeLists.txt | 12 | ||||
-rw-r--r-- | lib/Target/Blackfin/CMakeLists.txt | 14 | ||||
-rw-r--r-- | lib/Target/CellSPU/CMakeLists.txt | 14 | ||||
-rw-r--r-- | lib/Target/MBlaze/CMakeLists.txt | 20 | ||||
-rw-r--r-- | lib/Target/MSP430/CMakeLists.txt | 12 | ||||
-rw-r--r-- | lib/Target/Mips/CMakeLists.txt | 12 | ||||
-rw-r--r-- | lib/Target/PTX/CMakeLists.txt | 10 | ||||
-rw-r--r-- | lib/Target/PowerPC/CMakeLists.txt | 16 | ||||
-rw-r--r-- | lib/Target/Sparc/CMakeLists.txt | 12 | ||||
-rw-r--r-- | lib/Target/SystemZ/CMakeLists.txt | 12 | ||||
-rw-r--r-- | lib/Target/X86/CMakeLists.txt | 22 | ||||
-rw-r--r-- | lib/Target/XCore/CMakeLists.txt | 12 | ||||
-rw-r--r-- | lib/VMCore/Makefile | 4 |
14 files changed, 99 insertions, 99 deletions
diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt index dc9f4d6fd5..f045e839a6 100644 --- a/lib/Target/ARM/CMakeLists.txt +++ b/lib/Target/ARM/CMakeLists.txt @@ -1,18 +1,18 @@ set(LLVM_TARGET_DEFINITIONS ARM.td) -tablegen(ARMGenRegisterInfo.inc -gen-register-info) -tablegen(ARMGenInstrInfo.inc -gen-instr-info) -tablegen(ARMGenCodeEmitter.inc -gen-emitter) -tablegen(ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter) -tablegen(ARMGenMCPseudoLowering.inc -gen-pseudo-lowering) -tablegen(ARMGenAsmWriter.inc -gen-asm-writer) -tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher) -tablegen(ARMGenDAGISel.inc -gen-dag-isel) -tablegen(ARMGenFastISel.inc -gen-fast-isel) -tablegen(ARMGenCallingConv.inc -gen-callingconv) -tablegen(ARMGenSubtargetInfo.inc -gen-subtarget) -tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info) -tablegen(ARMGenDisassemblerTables.inc -gen-disassembler) +llvm_tablegen(ARMGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(ARMGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(ARMGenCodeEmitter.inc -gen-emitter) +llvm_tablegen(ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter) +llvm_tablegen(ARMGenMCPseudoLowering.inc -gen-pseudo-lowering) +llvm_tablegen(ARMGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher) +llvm_tablegen(ARMGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(ARMGenFastISel.inc -gen-fast-isel) +llvm_tablegen(ARMGenCallingConv.inc -gen-callingconv) +llvm_tablegen(ARMGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info) +llvm_tablegen(ARMGenDisassemblerTables.inc -gen-disassembler) add_public_tablegen_target(ARMCommonTableGen) add_llvm_target(ARMCodeGen diff --git a/lib/Target/Alpha/CMakeLists.txt b/lib/Target/Alpha/CMakeLists.txt index 63412c144b..a6d551618b 100644 --- a/lib/Target/Alpha/CMakeLists.txt +++ b/lib/Target/Alpha/CMakeLists.txt @@ -1,11 +1,11 @@ set(LLVM_TARGET_DEFINITIONS Alpha.td) -tablegen(AlphaGenRegisterInfo.inc -gen-register-info) -tablegen(AlphaGenInstrInfo.inc -gen-instr-info) -tablegen(AlphaGenAsmWriter.inc -gen-asm-writer) -tablegen(AlphaGenDAGISel.inc -gen-dag-isel) -tablegen(AlphaGenCallingConv.inc -gen-callingconv) -tablegen(AlphaGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(AlphaGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(AlphaGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(AlphaGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(AlphaGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(AlphaGenCallingConv.inc -gen-callingconv) +llvm_tablegen(AlphaGenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(AlphaCommonTableGen) add_llvm_target(AlphaCodeGen diff --git a/lib/Target/Blackfin/CMakeLists.txt b/lib/Target/Blackfin/CMakeLists.txt index a0b2e935cf..94d05fbf88 100644 --- a/lib/Target/Blackfin/CMakeLists.txt +++ b/lib/Target/Blackfin/CMakeLists.txt @@ -1,12 +1,12 @@ set(LLVM_TARGET_DEFINITIONS Blackfin.td) -tablegen(BlackfinGenRegisterInfo.inc -gen-register-info) -tablegen(BlackfinGenInstrInfo.inc -gen-instr-info) -tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer) -tablegen(BlackfinGenDAGISel.inc -gen-dag-isel) -tablegen(BlackfinGenSubtargetInfo.inc -gen-subtarget) -tablegen(BlackfinGenCallingConv.inc -gen-callingconv) -tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic) +llvm_tablegen(BlackfinGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(BlackfinGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(BlackfinGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(BlackfinGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(BlackfinGenCallingConv.inc -gen-callingconv) +llvm_tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic) add_public_tablegen_target(BlackfinCommonTableGen) add_llvm_target(BlackfinCodeGen diff --git a/lib/Target/CellSPU/CMakeLists.txt b/lib/Target/CellSPU/CMakeLists.txt index c16e53cdfe..158fb3eacc 100644 --- a/lib/Target/CellSPU/CMakeLists.txt +++ b/lib/Target/CellSPU/CMakeLists.txt @@ -1,12 +1,12 @@ set(LLVM_TARGET_DEFINITIONS SPU.td) -tablegen(SPUGenAsmWriter.inc -gen-asm-writer) -tablegen(SPUGenCodeEmitter.inc -gen-emitter) -tablegen(SPUGenRegisterInfo.inc -gen-register-info) -tablegen(SPUGenInstrInfo.inc -gen-instr-info) -tablegen(SPUGenDAGISel.inc -gen-dag-isel) -tablegen(SPUGenSubtargetInfo.inc -gen-subtarget) -tablegen(SPUGenCallingConv.inc -gen-callingconv) +llvm_tablegen(SPUGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(SPUGenCodeEmitter.inc -gen-emitter) +llvm_tablegen(SPUGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(SPUGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(SPUGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(SPUGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(SPUGenCallingConv.inc -gen-callingconv) add_public_tablegen_target(CellSPUCommonTableGen) add_llvm_target(CellSPUCodeGen diff --git a/lib/Target/MBlaze/CMakeLists.txt b/lib/Target/MBlaze/CMakeLists.txt index 20b3b036b0..47b0db2cb2 100644 --- a/lib/Target/MBlaze/CMakeLists.txt +++ b/lib/Target/MBlaze/CMakeLists.txt @@ -1,15 +1,15 @@ set(LLVM_TARGET_DEFINITIONS MBlaze.td) -tablegen(MBlazeGenRegisterInfo.inc -gen-register-info) -tablegen(MBlazeGenInstrInfo.inc -gen-instr-info) -tablegen(MBlazeGenCodeEmitter.inc -gen-emitter) -tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer) -tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher) -tablegen(MBlazeGenDAGISel.inc -gen-dag-isel) -tablegen(MBlazeGenCallingConv.inc -gen-callingconv) -tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget) -tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic) -tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info) +llvm_tablegen(MBlazeGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(MBlazeGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(MBlazeGenCodeEmitter.inc -gen-emitter) +llvm_tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher) +llvm_tablegen(MBlazeGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(MBlazeGenCallingConv.inc -gen-callingconv) +llvm_tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic) +llvm_tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info) add_public_tablegen_target(MBlazeCommonTableGen) add_llvm_target(MBlazeCodeGen diff --git a/lib/Target/MSP430/CMakeLists.txt b/lib/Target/MSP430/CMakeLists.txt index 3840b03b97..0952b76aef 100644 --- a/lib/Target/MSP430/CMakeLists.txt +++ b/lib/Target/MSP430/CMakeLists.txt @@ -1,11 +1,11 @@ set(LLVM_TARGET_DEFINITIONS MSP430.td) -tablegen(MSP430GenRegisterInfo.inc -gen-register-info) -tablegen(MSP430GenInstrInfo.inc -gen-instr-info) -tablegen(MSP430GenAsmWriter.inc -gen-asm-writer) -tablegen(MSP430GenDAGISel.inc -gen-dag-isel) -tablegen(MSP430GenCallingConv.inc -gen-callingconv) -tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(MSP430GenRegisterInfo.inc -gen-register-info) +llvm_tablegen(MSP430GenInstrInfo.inc -gen-instr-info) +llvm_tablegen(MSP430GenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(MSP430GenDAGISel.inc -gen-dag-isel) +llvm_tablegen(MSP430GenCallingConv.inc -gen-callingconv) +llvm_tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(MSP430CommonTableGen) add_llvm_target(MSP430CodeGen diff --git a/lib/Target/Mips/CMakeLists.txt b/lib/Target/Mips/CMakeLists.txt index 9daa89e54f..1b4329baf0 100644 --- a/lib/Target/Mips/CMakeLists.txt +++ b/lib/Target/Mips/CMakeLists.txt @@ -1,11 +1,11 @@ set(LLVM_TARGET_DEFINITIONS Mips.td) -tablegen(MipsGenRegisterInfo.inc -gen-register-info) -tablegen(MipsGenInstrInfo.inc -gen-instr-info) -tablegen(MipsGenAsmWriter.inc -gen-asm-writer) -tablegen(MipsGenDAGISel.inc -gen-dag-isel) -tablegen(MipsGenCallingConv.inc -gen-callingconv) -tablegen(MipsGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(MipsGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(MipsGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(MipsGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(MipsGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(MipsGenCallingConv.inc -gen-callingconv) +llvm_tablegen(MipsGenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(MipsCommonTableGen) add_llvm_target(MipsCodeGen diff --git a/lib/Target/PTX/CMakeLists.txt b/lib/Target/PTX/CMakeLists.txt index 2d5bc452ce..6e87b171d8 100644 --- a/lib/Target/PTX/CMakeLists.txt +++ b/lib/Target/PTX/CMakeLists.txt @@ -1,10 +1,10 @@ set(LLVM_TARGET_DEFINITIONS PTX.td) -tablegen(PTXGenAsmWriter.inc -gen-asm-writer) -tablegen(PTXGenDAGISel.inc -gen-dag-isel) -tablegen(PTXGenInstrInfo.inc -gen-instr-info) -tablegen(PTXGenRegisterInfo.inc -gen-register-info) -tablegen(PTXGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(PTXGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(PTXGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(PTXGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(PTXGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(PTXGenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(PTXCommonTableGen) add_llvm_target(PTXCodeGen diff --git a/lib/Target/PowerPC/CMakeLists.txt b/lib/Target/PowerPC/CMakeLists.txt index ec0a9186f2..73b4aba9f0 100644 --- a/lib/Target/PowerPC/CMakeLists.txt +++ b/lib/Target/PowerPC/CMakeLists.txt @@ -1,13 +1,13 @@ set(LLVM_TARGET_DEFINITIONS PPC.td) -tablegen(PPCGenAsmWriter.inc -gen-asm-writer) -tablegen(PPCGenCodeEmitter.inc -gen-emitter) -tablegen(PPCGenMCCodeEmitter.inc -gen-emitter -mc-emitter) -tablegen(PPCGenRegisterInfo.inc -gen-register-info) -tablegen(PPCGenInstrInfo.inc -gen-instr-info) -tablegen(PPCGenDAGISel.inc -gen-dag-isel) -tablegen(PPCGenCallingConv.inc -gen-callingconv) -tablegen(PPCGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(PPCGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(PPCGenCodeEmitter.inc -gen-emitter) +llvm_tablegen(PPCGenMCCodeEmitter.inc -gen-emitter -mc-emitter) +llvm_tablegen(PPCGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(PPCGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(PPCGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(PPCGenCallingConv.inc -gen-callingconv) +llvm_tablegen(PPCGenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(PowerPCCommonTableGen) add_llvm_target(PowerPCCodeGen diff --git a/lib/Target/Sparc/CMakeLists.txt b/lib/Target/Sparc/CMakeLists.txt index 0491229f61..5b87849b9d 100644 --- a/lib/Target/Sparc/CMakeLists.txt +++ b/lib/Target/Sparc/CMakeLists.txt @@ -1,11 +1,11 @@ set(LLVM_TARGET_DEFINITIONS Sparc.td) -tablegen(SparcGenRegisterInfo.inc -gen-register-info) -tablegen(SparcGenInstrInfo.inc -gen-instr-info) -tablegen(SparcGenAsmWriter.inc -gen-asm-writer) -tablegen(SparcGenDAGISel.inc -gen-dag-isel) -tablegen(SparcGenSubtargetInfo.inc -gen-subtarget) -tablegen(SparcGenCallingConv.inc -gen-callingconv) +llvm_tablegen(SparcGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(SparcGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(SparcGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(SparcGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(SparcGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(SparcGenCallingConv.inc -gen-callingconv) add_public_tablegen_target(SparcCommonTableGen) add_llvm_target(SparcCodeGen diff --git a/lib/Target/SystemZ/CMakeLists.txt b/lib/Target/SystemZ/CMakeLists.txt index 41b4c78bee..7c09c0ea7b 100644 --- a/lib/Target/SystemZ/CMakeLists.txt +++ b/lib/Target/SystemZ/CMakeLists.txt @@ -1,11 +1,11 @@ set(LLVM_TARGET_DEFINITIONS SystemZ.td) -tablegen(SystemZGenRegisterInfo.inc -gen-register-info) -tablegen(SystemZGenInstrInfo.inc -gen-instr-info) -tablegen(SystemZGenAsmWriter.inc -gen-asm-writer) -tablegen(SystemZGenDAGISel.inc -gen-dag-isel) -tablegen(SystemZGenCallingConv.inc -gen-callingconv) -tablegen(SystemZGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(SystemZGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(SystemZGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(SystemZGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(SystemZGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(SystemZGenCallingConv.inc -gen-callingconv) +llvm_tablegen(SystemZGenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(SystemZCommonTableGen) add_llvm_target(SystemZCodeGen diff --git a/lib/Target/X86/CMakeLists.txt b/lib/Target/X86/CMakeLists.txt index f71c1ef95c..351e7675a7 100644 --- a/lib/Target/X86/CMakeLists.txt +++ b/lib/Target/X86/CMakeLists.txt @@ -1,16 +1,16 @@ set(LLVM_TARGET_DEFINITIONS X86.td) -tablegen(X86GenRegisterInfo.inc -gen-register-info) -tablegen(X86GenDisassemblerTables.inc -gen-disassembler) -tablegen(X86GenInstrInfo.inc -gen-instr-info) -tablegen(X86GenAsmWriter.inc -gen-asm-writer) -tablegen(X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1) -tablegen(X86GenAsmMatcher.inc -gen-asm-matcher) -tablegen(X86GenDAGISel.inc -gen-dag-isel) -tablegen(X86GenFastISel.inc -gen-fast-isel) -tablegen(X86GenCallingConv.inc -gen-callingconv) -tablegen(X86GenSubtargetInfo.inc -gen-subtarget) -tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info) +llvm_tablegen(X86GenRegisterInfo.inc -gen-register-info) +llvm_tablegen(X86GenDisassemblerTables.inc -gen-disassembler) +llvm_tablegen(X86GenInstrInfo.inc -gen-instr-info) +llvm_tablegen(X86GenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1) +llvm_tablegen(X86GenAsmMatcher.inc -gen-asm-matcher) +llvm_tablegen(X86GenDAGISel.inc -gen-dag-isel) +llvm_tablegen(X86GenFastISel.inc -gen-fast-isel) +llvm_tablegen(X86GenCallingConv.inc -gen-callingconv) +llvm_tablegen(X86GenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info) add_public_tablegen_target(X86CommonTableGen) set(sources diff --git a/lib/Target/XCore/CMakeLists.txt b/lib/Target/XCore/CMakeLists.txt index dce6e32b6f..3dc51e1991 100644 --- a/lib/Target/XCore/CMakeLists.txt +++ b/lib/Target/XCore/CMakeLists.txt @@ -1,11 +1,11 @@ set(LLVM_TARGET_DEFINITIONS XCore.td) -tablegen(XCoreGenRegisterInfo.inc -gen-register-info) -tablegen(XCoreGenInstrInfo.inc -gen-instr-info) -tablegen(XCoreGenAsmWriter.inc -gen-asm-writer) -tablegen(XCoreGenDAGISel.inc -gen-dag-isel) -tablegen(XCoreGenCallingConv.inc -gen-callingconv) -tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget) +llvm_tablegen(XCoreGenRegisterInfo.inc -gen-register-info) +llvm_tablegen(XCoreGenInstrInfo.inc -gen-instr-info) +llvm_tablegen(XCoreGenAsmWriter.inc -gen-asm-writer) +llvm_tablegen(XCoreGenDAGISel.inc -gen-dag-isel) +llvm_tablegen(XCoreGenCallingConv.inc -gen-callingconv) +llvm_tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(XCoreCommonTableGen) add_llvm_target(XCoreCodeGen diff --git a/lib/VMCore/Makefile b/lib/VMCore/Makefile index 03a4fc707d..2b9b0f258c 100644 --- a/lib/VMCore/Makefile +++ b/lib/VMCore/Makefile @@ -20,9 +20,9 @@ GENFILE:=$(PROJ_OBJ_ROOT)/include/llvm/Intrinsics.gen INTRINSICTD := $(PROJ_SRC_ROOT)/include/llvm/Intrinsics.td INTRINSICTDS := $(wildcard $(PROJ_SRC_ROOT)/include/llvm/Intrinsics*.td) -$(ObjDir)/Intrinsics.gen.tmp: $(ObjDir)/.dir $(INTRINSICTDS) $(TBLGEN) +$(ObjDir)/Intrinsics.gen.tmp: $(ObjDir)/.dir $(INTRINSICTDS) $(LLVM_TBLGEN) $(Echo) Building Intrinsics.gen.tmp from Intrinsics.td - $(Verb) $(TableGen) $(call SYSPATH, $(INTRINSICTD)) -o $(call SYSPATH, $@) -gen-intrinsic + $(Verb) $(LLVMTableGen) $(call SYSPATH, $(INTRINSICTD)) -o $(call SYSPATH, $@) -gen-intrinsic $(GENFILE): $(ObjDir)/Intrinsics.gen.tmp $(Verb) $(CMP) -s $@ $< || ( $(CP) $< $@ && \ |