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author | Richard Smith <richard-llvm@metafoo.co.uk> | 2014-04-20 21:52:16 +0000 |
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committer | Richard Smith <richard-llvm@metafoo.co.uk> | 2014-04-20 21:52:16 +0000 |
commit | 6f37488863f7db2be9294b67e01fefc01751891c (patch) | |
tree | 9b326d9d820b6c2a5b3b5b8b562ff02021a24527 /lib | |
parent | 5aacafc256d19a105f51f0b003117a2087f26557 (diff) | |
download | llvm-6f37488863f7db2be9294b67e01fefc01751891c.tar.gz llvm-6f37488863f7db2be9294b67e01fefc01751891c.tar.bz2 llvm-6f37488863f7db2be9294b67e01fefc01751891c.tar.xz |
Don't provide two different definitions of ModRMDecision, OpcodeDecision, and ContextDecision in different source files (depending on #define magic).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206720 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
3 files changed, 23 insertions, 37 deletions
diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp index b80e3a90a6..070b365fd4 100644 --- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp +++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp @@ -22,6 +22,29 @@ using namespace llvm::X86Disassembler; +/// Specifies whether a ModR/M byte is needed and (if so) which +/// instruction each possible value of the ModR/M byte corresponds to. Once +/// this information is known, we have narrowed down to a single instruction. +struct ModRMDecision { + uint8_t modrm_type; + uint16_t instructionIDs; +}; + +/// Specifies which set of ModR/M->instruction tables to look at +/// given a particular opcode. +struct OpcodeDecision { + ModRMDecision modRMDecisions[256]; +}; + +/// Specifies which opcode->instruction tables to look at given +/// a particular context (set of attributes). Since there are many possible +/// contexts, the decoder first uses CONTEXTS_SYM to determine which context +/// applies given a specific set of attributes. Hence there are only IC_max +/// entries in this table, rather than 2^(ATTR_max). +struct ContextDecision { + OpcodeDecision opcodeDecisions[IC_max]; +}; + #include "X86GenDisassemblerTables.inc" #define TRUE 1 diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h index 67f52e55fa..c5335862a6 100644 --- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h +++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h @@ -16,14 +16,8 @@ #ifndef X86DISASSEMBLERDECODER_H #define X86DISASSEMBLERDECODER_H -#define INSTRUCTION_IDS \ - uint16_t instructionIDs; - #include "X86DisassemblerDecoderCommon.h" -#undef INSTRUCTION_SPECIFIER_FIELDS -#undef INSTRUCTION_IDS - namespace llvm { namespace X86Disassembler { diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h b/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h index d323fa2cc7..3ae1610179 100644 --- a/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h +++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h @@ -338,37 +338,6 @@ enum ModRMDecisionType { #undef ENUM_ENTRY /* - * ModRMDecision - Specifies whether a ModR/M byte is needed and (if so) which - * instruction each possible value of the ModR/M byte corresponds to. Once - * this information is known, we have narrowed down to a single instruction. - */ -struct ModRMDecision { - uint8_t modrm_type; - - /* The macro below must be defined wherever this file is included. */ - INSTRUCTION_IDS -}; - -/* - * OpcodeDecision - Specifies which set of ModR/M->instruction tables to look at - * given a particular opcode. - */ -struct OpcodeDecision { - ModRMDecision modRMDecisions[256]; -}; - -/* - * ContextDecision - Specifies which opcode->instruction tables to look at given - * a particular context (set of attributes). Since there are many possible - * contexts, the decoder first uses CONTEXTS_SYM to determine which context - * applies given a specific set of attributes. Hence there are only IC_max - * entries in this table, rather than 2^(ATTR_max). - */ -struct ContextDecision { - OpcodeDecision opcodeDecisions[IC_max]; -}; - -/* * Physical encodings of instruction operands. */ |