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| author | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-02-04 02:52:05 +0000 |
|---|---|---|
| committer | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-02-04 02:52:05 +0000 |
| commit | a7ad84851b018602487779d97195bad0536f9a7a (patch) | |
| tree | 3c0839201b04eeff17851e5ff8baab233f86f7d1 /test/Analysis/CostModel | |
| parent | 4b5dbaa96a6e51e925ac017468538754aad8e5cc (diff) | |
| download | llvm-a7ad84851b018602487779d97195bad0536f9a7a.tar.gz llvm-a7ad84851b018602487779d97195bad0536f9a7a.tar.bz2 llvm-a7ad84851b018602487779d97195bad0536f9a7a.tar.xz | |
ARM cost model: Penalize insertelement into D subregisters
Swift has a renaming dependency if we load into D subregisters. We don't have a
way of distinguishing between insertelement operations of values from loads and
other values. Therefore, we are pessimistic for now (The performance problem
showed up in example 14 of gcc-loops).
radar://13096933
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174300 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Analysis/CostModel')
| -rw-r--r-- | test/Analysis/CostModel/ARM/insertelement.ll | 46 | ||||
| -rw-r--r-- | test/Analysis/CostModel/ARM/lit.local.cfg | 6 |
2 files changed, 52 insertions, 0 deletions
diff --git a/test/Analysis/CostModel/ARM/insertelement.ll b/test/Analysis/CostModel/ARM/insertelement.ll new file mode 100644 index 0000000000..2d43e4ddd9 --- /dev/null +++ b/test/Analysis/CostModel/ARM/insertelement.ll @@ -0,0 +1,46 @@ +; RUN: opt -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -mcpu=swift < %s | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" +target triple = "thumbv7-apple-ios6.0.0" + +; Multiple insert elements from loads into d subregisters are expensive on swift +; due to renaming constraints. +%T_i8v = type <8 x i8> +%T_i8 = type i8 +; CHECK: insertelement_i8 +define void @insertelement_i8(%T_i8* %saddr, + %T_i8v* %vaddr) { + %v0 = load %T_i8v* %vaddr + %v1 = load %T_i8* %saddr +;CHECK: estimated cost of 2 for {{.*}} insertelement <8 x i8> + %v2 = insertelement %T_i8v %v0, %T_i8 %v1, i32 1 + store %T_i8v %v2, %T_i8v* %vaddr + ret void +} + + +%T_i16v = type <4 x i16> +%T_i16 = type i16 +; CHECK: insertelement_i16 +define void @insertelement_i16(%T_i16* %saddr, + %T_i16v* %vaddr) { + %v0 = load %T_i16v* %vaddr + %v1 = load %T_i16* %saddr +;CHECK: estimated cost of 2 for {{.*}} insertelement <4 x i16> + %v2 = insertelement %T_i16v %v0, %T_i16 %v1, i32 1 + store %T_i16v %v2, %T_i16v* %vaddr + ret void +} + +%T_i32v = type <2 x i32> +%T_i32 = type i32 +; CHECK: insertelement_i32 +define void @insertelement_i32(%T_i32* %saddr, + %T_i32v* %vaddr) { + %v0 = load %T_i32v* %vaddr + %v1 = load %T_i32* %saddr +;CHECK: estimated cost of 2 for {{.*}} insertelement <2 x i32> + %v2 = insertelement %T_i32v %v0, %T_i32 %v1, i32 1 + store %T_i32v %v2, %T_i32v* %vaddr + ret void +} diff --git a/test/Analysis/CostModel/ARM/lit.local.cfg b/test/Analysis/CostModel/ARM/lit.local.cfg new file mode 100644 index 0000000000..cb77b09ef4 --- /dev/null +++ b/test/Analysis/CostModel/ARM/lit.local.cfg @@ -0,0 +1,6 @@ +config.suffixes = ['.ll', '.c', '.cpp'] + +targets = set(config.root.targets_to_build.split()) +if not 'ARM' in targets: + config.unsupported = True + |