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| author | Chad Rosier <mcrosier@codeaurora.org> | 2013-10-31 22:36:59 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@codeaurora.org> | 2013-10-31 22:36:59 +0000 |
| commit | 1a035dd6df1d953af57656491eda28ceef9ad4a3 (patch) | |
| tree | 086a30eba7c50e5572ef40b8a5583e09ac23d978 /test/CodeGen/AArch64 | |
| parent | 14de0899bcb4c8805786f7323c4fd476574e76a9 (diff) | |
| download | llvm-1a035dd6df1d953af57656491eda28ceef9ad4a3.tar.gz llvm-1a035dd6df1d953af57656491eda28ceef9ad4a3.tar.bz2 llvm-1a035dd6df1d953af57656491eda28ceef9ad4a3.tar.xz | |
[AArch64] Add support for NEON scalar fixed-point convert to floating-point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193816 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64')
| -rw-r--r-- | test/CodeGen/AArch64/neon-scalar-cvt.ll | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/neon-scalar-cvt.ll b/test/CodeGen/AArch64/neon-scalar-cvt.ll index 0d9fdf3c97..056504a67e 100644 --- a/test/CodeGen/AArch64/neon-scalar-cvt.ll +++ b/test/CodeGen/AArch64/neon-scalar-cvt.ll @@ -47,3 +47,51 @@ entry: } declare <1 x double> @llvm.aarch64.neon.vcvtf64.u64(<1 x i64>) + +define float @test_vcvts_n_f32_s32(i32 %a) { +; CHECK: test_vcvts_n_f32_s32 +; CHECK: scvtf {{s[0-9]+}}, {{s[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0 + %vcvtf1 = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32> %vcvtf, i32 1) + %0 = extractelement <1 x float> %vcvtf1, i32 0 + ret float %0 +} + +declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32>, i32) + +define double @test_vcvtd_n_f64_s64(i64 %a) { +; CHECK: test_vcvtd_n_f64_s64 +; CHECK: scvtf {{d[0-9]+}}, {{d[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0 + %vcvtf1 = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64> %vcvtf, i32 1) + %0 = extractelement <1 x double> %vcvtf1, i32 0 + ret double %0 +} + +declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64>, i32) + +define float @test_vcvts_n_f32_u32(i32 %a) { +; CHECK: test_vcvts_n_f32_u32 +; CHECK: ucvtf {{s[0-9]+}}, {{s[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0 + %vcvtf1 = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32> %vcvtf, i32 1) + %0 = extractelement <1 x float> %vcvtf1, i32 0 + ret float %0 +} + +declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32>, i32) + +define double @test_vcvtd_n_f64_u64(i64 %a) { +; CHECK: test_vcvtd_n_f64_u64 +; CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0 + %vcvtf1 = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64> %vcvtf, i32 1) + %0 = extractelement <1 x double> %vcvtf1, i32 0 + ret double %0 +} + +declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64>, i32) |