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authorBob Wilson <bob.wilson@apple.com>2010-05-21 21:05:32 +0000
committerBob Wilson <bob.wilson@apple.com>2010-05-21 21:05:32 +0000
commit78f006acdfda52f7250929e1c2fea8afbb9a5b07 (patch)
treeaa5d4b7edd47a48dd661a7481e61950f6d93b097 /test/CodeGen/ARM/2009-11-02-NegativeLane.ll
parent1015ba7018c87f48cc7bb45a564eb4a27241e76a (diff)
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Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
so that it will continue to test what it was meant to test when I commit a separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon. Fix a DAG combiner crash exposed by this test change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/2009-11-02-NegativeLane.ll')
-rw-r--r--test/CodeGen/ARM/2009-11-02-NegativeLane.ll14
1 files changed, 7 insertions, 7 deletions
diff --git a/test/CodeGen/ARM/2009-11-02-NegativeLane.ll b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll
index f2288c3710..89c9037bd9 100644
--- a/test/CodeGen/ARM/2009-11-02-NegativeLane.ll
+++ b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=cortex-a8 < %s | grep vdup.32
+; RUN: llc -mcpu=cortex-a8 < %s | grep vdup.16
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "armv7-eabi"
@@ -7,12 +7,12 @@ entry:
br i1 undef, label %return, label %bb
bb: ; preds = %bb, %entry
- %0 = load float* undef, align 4 ; <float> [#uses=1]
- %1 = insertelement <4 x float> undef, float %0, i32 2 ; <<4 x float>> [#uses=1]
- %2 = insertelement <4 x float> %1, float undef, i32 3 ; <<4 x float>> [#uses=1]
- %3 = fmul <4 x float> undef, %2 ; <<4 x float>> [#uses=1]
- %4 = extractelement <4 x float> %3, i32 1 ; <float> [#uses=1]
- store float %4, float* undef, align 4
+ %0 = load i16* undef, align 2
+ %1 = insertelement <8 x i16> undef, i16 %0, i32 2
+ %2 = insertelement <8 x i16> %1, i16 undef, i32 3
+ %3 = mul <8 x i16> %2, %2
+ %4 = extractelement <8 x i16> %3, i32 2
+ store i16 %4, i16* undef, align 2
br i1 undef, label %return, label %bb
return: ; preds = %bb, %entry