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authorEric Christopher <echristo@apple.com>2012-04-10 18:18:10 +0000
committerEric Christopher <echristo@apple.com>2012-04-10 18:18:10 +0000
commit18112d83e7d54597bcd5870fb411c7997e02bc1e (patch)
tree0792eea6377628b357d274eaf1e2bf8eb48ca611 /test/CodeGen/ARM/fast-isel-br-const.ll
parentb79855ee181b0a74507022894b0f753af0041121 (diff)
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To ensure that we have more accurate line information for a block
don't elide the branch instruction if it's the only one in the block, otherwise it's ok. PR9796 and rdar://11215207 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154417 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-br-const.ll')
-rw-r--r--test/CodeGen/ARM/fast-isel-br-const.ll3
1 files changed, 2 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/fast-isel-br-const.ll b/test/CodeGen/ARM/fast-isel-br-const.ll
index 625adc2bef..7c532d5fba 100644
--- a/test/CodeGen/ARM/fast-isel-br-const.ll
+++ b/test/CodeGen/ARM/fast-isel-br-const.ll
@@ -5,7 +5,7 @@ define i32 @t1(i32 %a, i32 %b) nounwind uwtable ssp {
entry:
; THUMB: t1:
; ARM: t1:
-
+ %x = add i32 %a, %b
br i1 1, label %if.then, label %if.else
; THUMB-NOT: b LBB0_1
; ARM-NOT: b LBB0_1
@@ -24,6 +24,7 @@ if.then2: ; preds = %if.else
br label %if.end6
if.else3: ; preds = %if.else
+ %y = sub i32 %a, %b
br i1 1, label %if.then5, label %if.end
; THUMB-NOT: b LBB0_5
; ARM-NOT: b LBB0_5