diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-01-05 00:26:57 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-01-05 00:26:57 +0000 |
| commit | 7255a4e1332ccb69918ebe041dff05f9e4e5815d (patch) | |
| tree | 7378c1ee8ab51c78e53aeca3bde52ab3bda9a215 /test/CodeGen/ARM/fast-isel-deadcode.ll | |
| parent | 54f3b7a9109d1916cf25ffdb2ed5045f03121b5a (diff) | |
| download | llvm-7255a4e1332ccb69918ebe041dff05f9e4e5815d.tar.gz llvm-7255a4e1332ccb69918ebe041dff05f9e4e5815d.tar.bz2 llvm-7255a4e1332ccb69918ebe041dff05f9e4e5815d.tar.xz | |
Reapply r146997, "Heed spill slot alignment on ARM."
Now that canRealignStack() understands frozen reserved registers, it is
safe to use it for aligned spill instructions.
It will only return true if the registers reserved at the beginning of
register allocation allow for dynamic stack realignment.
<rdar://problem/10625436>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147579 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-deadcode.ll')
| -rw-r--r-- | test/CodeGen/ARM/fast-isel-deadcode.ll | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/test/CodeGen/ARM/fast-isel-deadcode.ll b/test/CodeGen/ARM/fast-isel-deadcode.ll index 1d77975ee8..7e147c7b4d 100644 --- a/test/CodeGen/ARM/fast-isel-deadcode.ll +++ b/test/CodeGen/ARM/fast-isel-deadcode.ll @@ -15,8 +15,7 @@ entry: ; THUMB-NOT: sxtb ; THUMB: movs r0, #0 ; THUMB: movt r0, #0 -; THUMB: add sp, #32 -; THUMb: pop {r7, pc} +; THUMB: pop ret i32 0 } |