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| author | Derek Schuff <dschuff@google.com> | 2013-05-14 16:26:38 +0000 |
|---|---|---|
| committer | Derek Schuff <dschuff@google.com> | 2013-05-14 16:26:38 +0000 |
| commit | ed788b62830c26bd1f5d23d73a6337c88b66ab61 (patch) | |
| tree | 6c3d5ba1af380c2add0fe390c47ccf3ea90b83b2 /test/CodeGen/ARM/fast-isel.ll | |
| parent | ded53bf4dd499f213334400fa870d0c7896d1d0d (diff) | |
| download | llvm-ed788b62830c26bd1f5d23d73a6337c88b66ab61.tar.gz llvm-ed788b62830c26bd1f5d23d73a6337c88b66ab61.tar.bz2 llvm-ed788b62830c26bd1f5d23d73a6337c88b66ab61.tar.xz | |
Fix ARM FastISel tests, as a first step to enabling ARM FastISel
ARM FastISel is currently only enabled for iOS non-Thumb1, and I'm working on
enabling it for other targets. As a first step I've fixed some of the tests.
Changes to ARM FastISel tests:
- Different triples don't generate the same relocations (especially
movw/movt versus constant pool loads). Use a regex to allow either.
- Mangling is different. Use a regex to allow either.
- The reserved registers are sometimes different, so registers get
allocated in a different order. Capture the names only where this
occurs.
- Add -verify-machineinstrs to some tests where it works. It doesn't
work everywhere it should yet.
- Add -fast-isel-abort to many tests that didn't have it before.
- Split out the VarArg test from fast-isel-call.ll into its own
test. This simplifies test setup because of --check-prefix.
Patch by JF Bastien
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181801 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fast-isel.ll')
| -rw-r--r-- | test/CodeGen/ARM/fast-isel.ll | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/test/CodeGen/ARM/fast-isel.ll b/test/CodeGen/ARM/fast-isel.ll index 41fda41326..39ffcac292 100644 --- a/test/CodeGen/ARM/fast-isel.ll +++ b/test/CodeGen/ARM/fast-isel.ll @@ -144,15 +144,19 @@ define void @test4() { store i32 %b, i32* @test4g ret void -; THUMB: movw r0, :lower16:L_test4g$non_lazy_ptr -; THUMB: movt r0, :upper16:L_test4g$non_lazy_ptr + +; Note that relocations are either movw/movt or constant pool +; loads. Different platforms will select different approaches. + +; THUMB: {{(movw r0, :lower16:L_test4g\$non_lazy_ptr)|(ldr.n r0, .LCPI)}} +; THUMB: {{(movt r0, :upper16:L_test4g\$non_lazy_ptr)?}} ; THUMB: ldr r0, [r0] ; THUMB: ldr r1, [r0] ; THUMB: adds r1, #1 ; THUMB: str r1, [r0] -; ARM: movw r0, :lower16:L_test4g$non_lazy_ptr -; ARM: movt r0, :upper16:L_test4g$non_lazy_ptr +; ARM: {{(movw r0, :lower16:L_test4g\$non_lazy_ptr)|(ldr r0, .LCPI)}} +; ARM: {{(movt r0, :upper16:L_test4g\$non_lazy_ptr)?}} ; ARM: ldr r0, [r0] ; ARM: ldr r1, [r0] ; ARM: add r1, r1, #1 |