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| author | Evan Cheng <evan.cheng@apple.com> | 2007-06-20 18:26:15 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-06-20 18:26:15 +0000 |
| commit | 60c916bc72f3ed7f767dfabfd07555c3d3630766 (patch) | |
| tree | af1be6170f6a81707e6fc1c3257eb609952ac997 /test/CodeGen/ARM/ifcvt2.ll | |
| parent | 5dbea73e35a5e07d43c5f7e7abbc36bac20bad14 (diff) | |
| download | llvm-60c916bc72f3ed7f767dfabfd07555c3d3630766.tar.gz llvm-60c916bc72f3ed7f767dfabfd07555c3d3630766.tar.bz2 llvm-60c916bc72f3ed7f767dfabfd07555c3d3630766.tar.xz | |
Added some if-conversion tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37672 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/ifcvt2.ll')
| -rw-r--r-- | test/CodeGen/ARM/ifcvt2.ll | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/ifcvt2.ll b/test/CodeGen/ARM/ifcvt2.ll new file mode 100644 index 0000000000..78545b8a07 --- /dev/null +++ b/test/CodeGen/ARM/ifcvt2.ll @@ -0,0 +1,36 @@ +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxlt | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxgt | wc -l | grep 1 +; RUN: llvm-as < %s | llc -march=arm -enable-arm-if-conversion | grep bxge | wc -l | grep 1 + +define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { + %tmp2 = icmp sgt i32 %c, 10 + %tmp5 = icmp slt i32 %d, 4 + %tmp8 = or i1 %tmp5, %tmp2 + %tmp13 = add i32 %b, %a + br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock + +cond_true: + %tmp15 = add i32 %tmp13, %c + %tmp1821 = sub i32 %tmp15, %d + ret i32 %tmp1821 + +UnifiedReturnBlock: + ret i32 %tmp13 +} + +define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) { + %tmp2 = icmp sgt i32 %c, 10 + %tmp5 = icmp slt i32 %d, 4 + %tmp8 = and i1 %tmp5, %tmp2 + %tmp13 = add i32 %b, %a + br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock + +cond_true: + %tmp15 = add i32 %tmp13, %c + %tmp1821 = sub i32 %tmp15, %d + ret i32 %tmp1821 + +UnifiedReturnBlock: + ret i32 %tmp13 +} |