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| author | Evan Cheng <evan.cheng@apple.com> | 2010-11-03 05:14:24 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-11-03 05:14:24 +0000 |
| commit | bc7deb0f758d2544fc4c36433668340cbf4835cf (patch) | |
| tree | 85279fa1044c622b56ed1ed86798bc4467f74686 /test/CodeGen/ARM/prefetch.ll | |
| parent | cdbbec43a837532d6a19e95320361c4b7c215a02 (diff) | |
| download | llvm-bc7deb0f758d2544fc4c36433668340cbf4835cf.tar.gz llvm-bc7deb0f758d2544fc4c36433668340cbf4835cf.tar.bz2 llvm-bc7deb0f758d2544fc4c36433668340cbf4835cf.tar.xz | |
Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118152 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/prefetch.ll')
| -rw-r--r-- | test/CodeGen/ARM/prefetch.ll | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/prefetch.ll b/test/CodeGen/ARM/prefetch.ll new file mode 100644 index 0000000000..dbc1002e50 --- /dev/null +++ b/test/CodeGen/ARM/prefetch.ll @@ -0,0 +1,64 @@ +; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s -check-prefix=THUMB2 +; RUN: llc < %s -march=arm -mattr=+v5te | FileCheck %s -check-prefix=ARM +; rdar://8601536 + +define void @t1(i8* %ptr) nounwind { +entry: +; ARM: t1: +; ARM: pli [r0] +; ARM: pldw [r0] +; ARM: pld [r0] + +; THUMB2: t1: +; THUMB2: pli [r0] +; THUMB2: pldw [r0] +; THUMB2: pld [r0] + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) + ret void +} + +define void @t2(i8* %ptr) nounwind { +entry: +; ARM: t2: +; ARM: pld [r0, #1023] + +; THUMB2: t2: +; THUMB2: pld [r0, #1023] + %tmp = getelementptr i8* %ptr, i32 1023 + tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 ) + ret void +} + +define void @t3(i32 %base, i32 %offset) nounwind { +entry: +; ARM: t3: +; ARM: pld [r0, r1, lsr #2] + +; THUMB2: t3: +; THUMB2: lsrs r1, r1, #2 +; THUMB2: pld [r0, r1] + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +define void @t4(i32 %base, i32 %offset) nounwind { +entry: +; ARM: t4: +; ARM: pld [r0, r1, lsl #2] + +; THUMB2: t4: +; THUMB2: pld [r0, r1, lsl #2] + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +declare void @llvm.prefetch(i8*, i32, i32) nounwind |