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| author | Bob Wilson <bob.wilson@apple.com> | 2010-12-15 22:14:12 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-12-15 22:14:12 +0000 |
| commit | 0406356cd4cb7b689e2472faa8dfb7d721f9d274 (patch) | |
| tree | 0c1e2f26438acad7f4053004cd38fe2d9282c52d /test/CodeGen/ARM/vcvt.ll | |
| parent | 8d1b7e57e56015576fd489a57d74c53b98c5a56f (diff) | |
| download | llvm-0406356cd4cb7b689e2472faa8dfb7d721f9d274.tar.gz llvm-0406356cd4cb7b689e2472faa8dfb7d721f9d274.tar.bz2 llvm-0406356cd4cb7b689e2472faa8dfb7d721f9d274.tar.xz | |
Add Neon VCVT instructions for f32 <-> f16 conversions.
Clang is now providing intrinsics for these and so we need to support them
in the backend. Radar 8068427.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121902 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vcvt.ll')
| -rw-r--r-- | test/CodeGen/ARM/vcvt.ll | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/vcvt.ll b/test/CodeGen/ARM/vcvt.ll index f4cc5368d9..c078f49309 100644 --- a/test/CodeGen/ARM/vcvt.ll +++ b/test/CodeGen/ARM/vcvt.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+neon,+fp16 | FileCheck %s define <2 x i32> @vcvt_f32tos32(<2 x float>* %A) nounwind { ;CHECK: vcvt_f32tos32: @@ -138,3 +138,21 @@ declare <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float>, i32) nounwi declare <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone declare <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone +define <4 x float> @vcvt_f16tof32(<4 x i16>* %A) nounwind { +;CHECK: vcvt_f16tof32: +;CHECK: vcvt.f32.f16 + %tmp1 = load <4 x i16>* %A + %tmp2 = call <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16> %tmp1) + ret <4 x float> %tmp2 +} + +define <4 x i16> @vcvt_f32tof16(<4 x float>* %A) nounwind { +;CHECK: vcvt_f32tof16: +;CHECK: vcvt.f16.f32 + %tmp1 = load <4 x float>* %A + %tmp2 = call <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float> %tmp1) + ret <4 x i16> %tmp2 +} + +declare <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16>) nounwind readnone +declare <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float>) nounwind readnone |