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author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-09 15:24:12 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-09 15:24:12 +0000 |
commit | a17303598934c78afb04f623a85cd99ec0261989 (patch) | |
tree | 30d9be99ad0165ce5977a6d50dc2a34d7855f69e /test/CodeGen/ARM/vld4.ll | |
parent | 886b940a1d6fedd28b84bd3fe06963bfd1451382 (diff) | |
download | llvm-a17303598934c78afb04f623a85cd99ec0261989.tar.gz llvm-a17303598934c78afb04f623a85cd99ec0261989.tar.bz2 llvm-a17303598934c78afb04f623a85cd99ec0261989.tar.xz |
Merging r199369:
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r199369 | jiangning.liu | 2014-01-16 04:16:13 -0500 (Thu, 16 Jan 2014) | 2 lines
For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@205901 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vld4.ll')
-rw-r--r-- | test/CodeGen/ARM/vld4.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/vld4.ll b/test/CodeGen/ARM/vld4.ll index f7376b503a..ff162bb022 100644 --- a/test/CodeGen/ARM/vld4.ll +++ b/test/CodeGen/ARM/vld4.ll @@ -83,6 +83,19 @@ define <1 x i64> @vld4i64(i64* %A) nounwind { ret <1 x i64> %tmp4 } +define <1 x i64> @vld4i64_update(i64** %ptr, i64* %A) nounwind { +;CHECK-LABEL: vld4i64_update: +;CHECK: vld1.64 {d16, d17, d18, d19}, [r1:256]! + %tmp0 = bitcast i64* %A to i8* + %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8* %tmp0, i32 64) + %tmp5 = getelementptr i64* %A, i32 4 + store i64* %tmp5, i64** %ptr + %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2 + %tmp4 = add <1 x i64> %tmp2, %tmp3 + ret <1 x i64> %tmp4 +} + define <16 x i8> @vld4Qi8(i8* %A) nounwind { ;CHECK-LABEL: vld4Qi8: ;Check the alignment value. Max for this instruction is 256 bits: |