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author | Bob Wilson <bob.wilson@apple.com> | 2010-12-10 19:37:42 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2010-12-10 19:37:42 +0000 |
commit | a92bac64cb75853c65a6146e015c2bf60c710869 (patch) | |
tree | 2692ed915ca4d309a99b8220caeec647a4cd3e81 /test/CodeGen/ARM/vlddup.ll | |
parent | 568f528c997505706d3d02a31517338ef7dc2d17 (diff) | |
download | llvm-a92bac64cb75853c65a6146e015c2bf60c710869.tar.gz llvm-a92bac64cb75853c65a6146e015c2bf60c710869.tar.bz2 llvm-a92bac64cb75853c65a6146e015c2bf60c710869.tar.xz |
Fix some invalid alignments for Neon vld-dup and vld/st-lane instructions.
Alignments smaller than the total size of the memory being loaded or stored,
unless the alignment is 8 bytes, are not allowed. Add tests for this, too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121506 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vlddup.ll')
-rw-r--r-- | test/CodeGen/ARM/vlddup.ll | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/vlddup.ll b/test/CodeGen/ARM/vlddup.ll index 5822d3c4ff..bb07ce2d23 100644 --- a/test/CodeGen/ARM/vlddup.ll +++ b/test/CodeGen/ARM/vlddup.ll @@ -41,6 +41,7 @@ define <16 x i8> @vld1dupQi8(i8* %A) nounwind { } %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } +%struct.__neon_int4x16x2_t = type { <4 x i16>, <4 x i16> } %struct.__neon_int2x32x2_t = type { <2 x i32>, <2 x i32> } define <8 x i8> @vld2dupi8(i8* %A) nounwind { @@ -56,6 +57,20 @@ define <8 x i8> @vld2dupi8(i8* %A) nounwind { ret <8 x i8> %tmp5 } +define <4 x i16> @vld2dupi16(i16* %A) nounwind { +;CHECK: vld2dupi16: +;Check that a power-of-two alignment smaller than the total size of the memory +;being loaded is ignored. +;CHECK: vld2.16 {d16[], d17[]}, [r0] + %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2) + %tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = add <4 x i16> %tmp2, %tmp4 + ret <4 x i16> %tmp5 +} + define <2 x i32> @vld2dupi32(i32* %A) nounwind { ;CHECK: vld2dupi32: ;Check the alignment value. Max for this instruction is 64 bits: @@ -70,6 +85,7 @@ define <2 x i32> @vld2dupi32(i32* %A) nounwind { } declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly +declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> } @@ -96,9 +112,10 @@ declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16*, <4 x i16> define <2 x i32> @vld4dupi32(i32* %A) nounwind { ;CHECK: vld4dupi32: -;Check the alignment value. Max for this instruction is 128 bits: -;CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r0, :128] - %tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 32) +;Check the alignment value. An 8-byte alignment is allowed here even though +;it is smaller than the total size of the memory being loaded. +;CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r0, :64] + %tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 8) %tmp1 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 0 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 1 |