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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-27 22:39:16 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-27 22:39:16 +0000 |
| commit | b0117eed84b7899c677a1da5e074fe3a2b7046dd (patch) | |
| tree | 0393fde52423240ceed08b53bb767af7bee868dd /test/CodeGen/ARM/vldlane.ll | |
| parent | 146af5ae65a2b66df12240365b6a93c24740df42 (diff) | |
| download | llvm-b0117eed84b7899c677a1da5e074fe3a2b7046dd.tar.gz llvm-b0117eed84b7899c677a1da5e074fe3a2b7046dd.tar.bz2 llvm-b0117eed84b7899c677a1da5e074fe3a2b7046dd.tar.xz | |
Also set addrmode6 alignment when align==size.
Previously, we were only setting the alignment bits on over-aligned
loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143160 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vldlane.ll')
| -rw-r--r-- | test/CodeGen/ARM/vldlane.ll | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/test/CodeGen/ARM/vldlane.ll b/test/CodeGen/ARM/vldlane.ll index 0d7d4ec294..7bd0cbda02 100644 --- a/test/CodeGen/ARM/vldlane.ll +++ b/test/CodeGen/ARM/vldlane.ll @@ -31,9 +31,19 @@ define <2 x i32> @vld1lanei32(i32* %A, <2 x i32>* %B) nounwind { ret <2 x i32> %tmp3 } +define <2 x i32> @vld1lanei32a32(i32* %A, <2 x i32>* %B) nounwind { +;CHECK: vld1lanei32a32: +;Check the alignment value. Legal values are none or :32. +;CHECK: vld1.32 {d16[1]}, [r0, :32] + %tmp1 = load <2 x i32>* %B + %tmp2 = load i32* %A, align 4 + %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1 + ret <2 x i32> %tmp3 +} + define <2 x float> @vld1lanef(float* %A, <2 x float>* %B) nounwind { ;CHECK: vld1lanef: -;CHECK: vld1.32 {d16[1]}, [r0] +;CHECK: vld1.32 {d16[1]}, [r0, :32] %tmp1 = load <2 x float>* %B %tmp2 = load float* %A, align 4 %tmp3 = insertelement <2 x float> %tmp1, float %tmp2, i32 1 @@ -69,7 +79,7 @@ define <4 x i32> @vld1laneQi32(i32* %A, <4 x i32>* %B) nounwind { define <4 x float> @vld1laneQf(float* %A, <4 x float>* %B) nounwind { ;CHECK: vld1laneQf: -;CHECK: vld1.32 {d16[0]}, [r0] +;CHECK: vld1.32 {d16[0]}, [r0, :32] %tmp1 = load <4 x float>* %B %tmp2 = load float* %A %tmp3 = insertelement <4 x float> %tmp1, float %tmp2, i32 0 |