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authorBob Wilson <bob.wilson@apple.com>2010-11-03 16:24:53 +0000
committerBob Wilson <bob.wilson@apple.com>2010-11-03 16:24:53 +0000
commitd168cef6647c3a02e5b22d8d651e344af6b96fe2 (patch)
tree8b8fe0f15f3af91fb1d8438925c7e00d5197f3c4 /test/CodeGen/ARM/vldlane.ll
parent3468c2ee20e26ded1a5182edcc72e36fb09c909b (diff)
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Add codegen patterns for VST1-lane instructions. Radar 8599955.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118176 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vldlane.ll')
-rw-r--r--test/CodeGen/ARM/vldlane.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/vldlane.ll b/test/CodeGen/ARM/vldlane.ll
index 97ab399043..fc14e24d86 100644
--- a/test/CodeGen/ARM/vldlane.ll
+++ b/test/CodeGen/ARM/vldlane.ll
@@ -22,7 +22,7 @@ define <4 x i16> @vld1lanei16(i16* %A, <4 x i16>* %B) nounwind {
define <2 x i32> @vld1lanei32(i32* %A, <2 x i32>* %B) nounwind {
;CHECK: vld1lanei32:
-;Check the alignment value. Max for this instruction is 16 bits:
+;Check the alignment value. Max for this instruction is 32 bits:
;CHECK: vld1.32 {d16[1]}, [r0, :32]
%tmp1 = load <2 x i32>* %B
%tmp2 = load i32* %A, align 8