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| author | Kristof Beyls <kristof.beyls@arm.com> | 2013-02-22 10:01:33 +0000 |
|---|---|---|
| committer | Kristof Beyls <kristof.beyls@arm.com> | 2013-02-22 10:01:33 +0000 |
| commit | 29e05fe7a885bd03d8570d2bcf14193013776bcd (patch) | |
| tree | 34a8c2abf3930ebe1e31f1f839a886628f51a9e9 /test/CodeGen/ARM/vst1.ll | |
| parent | 351b7a10e2560a835759748c58da09e53207b39d (diff) | |
| download | llvm-29e05fe7a885bd03d8570d2bcf14193013776bcd.tar.gz llvm-29e05fe7a885bd03d8570d2bcf14193013776bcd.tar.bz2 llvm-29e05fe7a885bd03d8570d2bcf14193013776bcd.tar.xz | |
Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.
The Printer will now print instructions with the correct alignment specifier syntax, like
vld1.8 {d16}, [r0:64]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vst1.ll')
| -rw-r--r-- | test/CodeGen/ARM/vst1.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/ARM/vst1.ll b/test/CodeGen/ARM/vst1.ll index 364d44b711..e1f3e88907 100644 --- a/test/CodeGen/ARM/vst1.ll +++ b/test/CodeGen/ARM/vst1.ll @@ -3,7 +3,7 @@ define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst1i8: ;Check the alignment value. Max for this instruction is 64 bits: -;CHECK: vst1.8 {d16}, [r0, :64] +;CHECK: vst1.8 {d16}, [r0:64] %tmp1 = load <8 x i8>* %B call void @llvm.arm.neon.vst1.v8i8(i8* %A, <8 x i8> %tmp1, i32 16) ret void @@ -61,7 +61,7 @@ define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind { define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vst1Qi8: ;Check the alignment value. Max for this instruction is 128 bits: -;CHECK: vst1.8 {d16, d17}, [r0, :64] +;CHECK: vst1.8 {d16, d17}, [r0:64] %tmp1 = load <16 x i8>* %B call void @llvm.arm.neon.vst1.v16i8(i8* %A, <16 x i8> %tmp1, i32 8) ret void @@ -70,7 +70,7 @@ define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind { define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vst1Qi16: ;Check the alignment value. Max for this instruction is 128 bits: -;CHECK: vst1.16 {d16, d17}, [r0, :128] +;CHECK: vst1.16 {d16, d17}, [r0:128] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 32) @@ -80,7 +80,7 @@ define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind { ;Check for a post-increment updating store with register increment. define void @vst1Qi16_update(i16** %ptr, <8 x i16>* %B, i32 %inc) nounwind { ;CHECK: vst1Qi16_update: -;CHECK: vst1.16 {d16, d17}, [r1, :64], r2 +;CHECK: vst1.16 {d16, d17}, [r1:64], r2 %A = load i16** %ptr %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B |